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BibTeX records: Lenos Ioannou
@article{DBLP:journals/trets/IoannouF23, author = {Lenos Ioannou and Suhaib A. Fahmy}, title = {Streaming Overlay Architecture for Lightweight {LSTM} Computation on {FPGA} SoCs}, journal = {{ACM} Trans. Reconfigurable Technol. Syst.}, volume = {16}, number = {1}, pages = {8:1--8:26}, year = {2023}, url = {https://doi.org/10.1145/3543069}, doi = {10.1145/3543069}, timestamp = {Tue, 28 Mar 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/trets/IoannouF23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@phdthesis{DBLP:phd/ethos/Ioannou21, author = {Lenos Ioannou}, title = {Exploring the capabilities of {FPGA} {DSP} blocks in neural network accelerators}, school = {University of Warwick, Coventry, {UK}}, year = {2021}, url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.860988}, timestamp = {Wed, 12 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/phd/ethos/Ioannou21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/IoannouAF20, author = {Lenos Ioannou and Abdullah Al{-}Dujaili and Suhaib A. Fahmy}, title = {High Throughput Spatial Convolution Filters on FPGAs}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {28}, number = {6}, pages = {1392--1402}, year = {2020}, url = {https://doi.org/10.1109/TVLSI.2020.2987202}, doi = {10.1109/TVLSI.2020.2987202}, timestamp = {Tue, 16 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/IoannouAF20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/IoannouF19, author = {Lenos Ioannou and Suhaib A. Fahmy}, editor = {Ioannis Sourdis and Christos{-}Savvas Bouganis and Carlos {\'{A}}lvarez and Leonel Antonio Toledo D{\'{\i}}az and Pedro Valero{-}Lara and Xavier Martorell}, title = {Network Intrusion Detection Using Neural Networks on {FPGA} SoCs}, booktitle = {29th International Conference on Field Programmable Logic and Applications, {FPL} 2019, Barcelona, Spain, September 8-12, 2019}, pages = {232--238}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/FPL.2019.00043}, doi = {10.1109/FPL.2019.00043}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/IoannouF19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/IoannouF19a, author = {Lenos Ioannou and Suhaib A. Fahmy}, editor = {Ioannis Sourdis and Christos{-}Savvas Bouganis and Carlos {\'{A}}lvarez and Leonel Antonio Toledo D{\'{\i}}az and Pedro Valero{-}Lara and Xavier Martorell}, title = {Neural Network Overlay Using {FPGA} {DSP} Blocks}, booktitle = {29th International Conference on Field Programmable Logic and Applications, {FPL} 2019, Barcelona, Spain, September 8-12, 2019}, pages = {252--253}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/FPL.2019.00048}, doi = {10.1109/FPL.2019.00048}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/IoannouF19a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icfpt/IoannouF19, author = {Lenos Ioannou and Suhaib A. Fahmy}, title = {Lightweight Programmable {DSP} Block Overlay for Streaming Neural Network Acceleration}, booktitle = {International Conference on Field-Programmable Technology, {FPT} 2019, Tianjin, China, December 9-13, 2019}, pages = {355--358}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ICFPT47387.2019.00066}, doi = {10.1109/ICFPT47387.2019.00066}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/icfpt/IoannouF19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hipeac/MichailIV15, author = {Harris E. Michail and Lenos Ioannou and Artemios G. Voyiatzis}, editor = {Andy D. Pimentel and Stephan Wong and Gerardo Pelosi and Israel Koren and Giovanni Agosta and Alessandro Barenghi}, title = {Pipelined {SHA-3} Implementations on {FPGA:} Architecture and Performance Analysis}, booktitle = {Proceedings of the Second Workshop on Cryptography and Security in Computing Systems, CS2@HiPEAC 2015, Amsterdam, Netherlands, January 19-21, 2015}, pages = {13--18}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2694805.2694808}, doi = {10.1145/2694805.2694808}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hipeac/MichailIV15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/meco/IoannouMV15, author = {Lenos Ioannou and Harris E. Michail and Artemios G. Voyiatzis}, title = {High performance pipelined {FPGA} implementation of the {SHA-3} hash algorithm}, booktitle = {4th Mediterranean Conference on Embedded Computing, {MECO} 2015, Budva, Montenegro, June 14-18, 2015}, pages = {68--71}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/MECO.2015.7181868}, doi = {10.1109/MECO.2015.7181868}, timestamp = {Mon, 09 Aug 2021 14:54:01 +0200}, biburl = {https://dblp.org/rec/conf/meco/IoannouMV15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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