BibTeX records: Marc J. M. Heijligers

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@article{DBLP:journals/vlsisp/MolnosCHE09,
  author       = {Anca Mariana Molnos and
                  Sorin Cotofana and
                  Marc J. M. Heijligers and
                  Jos T. J. van Eijndhoven},
  title        = {Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors},
  journal      = {J. Signal Process. Syst.},
  volume       = {57},
  number       = {2},
  pages        = {155--172},
  year         = {2009},
  url          = {https://doi.org/10.1007/s11265-008-0276-5},
  doi          = {10.1007/S11265-008-0276-5},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/MolnosCHE09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/AbboKCSWMVH08,
  author       = {Anteneh A. Abbo and
                  Richard P. Kleihorst and
                  Vishal Choudhary and
                  Leo Sevat and
                  Paul Wielage and
                  Sebastien Mouy and
                  Bart Vermeulen and
                  Marc J. M. Heijligers},
  title        = {Xetal-II: {A} 107 GOPS, 600 mW Massively Parallel Processor for Video
                  Scene Analysis},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {43},
  number       = {1},
  pages        = {192--201},
  year         = {2008},
  url          = {https://doi.org/10.1109/JSSC.2007.909328},
  doi          = {10.1109/JSSC.2007.909328},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/AbboKCSWMVH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/MolnosHC08,
  author       = {Anca Mariana Molnos and
                  Marc J. M. Heijligers and
                  Sorin Dan Cotofana},
  editor       = {Donatella Sciuto},
  title        = {Compositional, dynamic cache management for embedded chip multiprocessors},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
                  March 10-14, 2008},
  pages        = {991--996},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1109/DATE.2008.4484810},
  doi          = {10.1109/DATE.2008.4484810},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/MolnosHC08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/thipeac/MolnosCHE07,
  author       = {Anca Mariana Molnos and
                  Sorin Dan Cotofana and
                  Marc J. M. Heijligers and
                  Jos T. J. van Eijndhoven},
  title        = {Static Cache Partitioning Robustness Analysis for Embedded On-Chip
                  Multi-processors},
  journal      = {Trans. High Perform. Embed. Archit. Compil.},
  volume       = {1},
  pages        = {279--297},
  year         = {2007},
  url          = {https://doi.org/10.1007/978-3-540-71528-3\_18},
  doi          = {10.1007/978-3-540-71528-3\_18},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/thipeac/MolnosCHE07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icdsc/DiazHKD07,
  author       = {Isael Diaz and
                  Marc J. M. Heijligers and
                  Richard P. Kleihorst and
                  Alexander Danilin},
  title        = {An Embedded Low Power High Efficient Object Tracker for Surveillance
                  Systems},
  booktitle    = {2007 First {ACM/IEEE} International Conference on Distributed Smart
                  Cameras, {ICDSC} 2007, Vienna, Austria, 25-28 September, 2007},
  pages        = {372--378},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ICDSC.2007.4357546},
  doi          = {10.1109/ICDSC.2007.4357546},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/icdsc/DiazHKD07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/AbboKCSWMH07,
  author       = {Anteneh A. Abbo and
                  Richard P. Kleihorst and
                  Vishal Choudhary and
                  Leo Sevat and
                  Paul Wielage and
                  Sebastien Mouy and
                  Marc J. M. Heijligers},
  title        = {{XETAL-II:} {A} 107 GOPS, 600mW Massively-Parallel Processor for Video
                  Scene Analysis},
  booktitle    = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2007, Digest of Technical Papers, San Francisco, CA, USA, February
                  11-15, 2007},
  pages        = {270--602},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISSCC.2007.373398},
  doi          = {10.1109/ISSCC.2007.373398},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/AbboKCSWMH07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-0710-4658,
  author       = {Anca Mariana Molnos and
                  Marc J. M. Heijligers and
                  Sorin Dan Cotofana and
                  Jos T. J. van Eijndhoven},
  title        = {Compositional Memory Systems for Multimedia Communicating Tasks},
  journal      = {CoRR},
  volume       = {abs/0710.4658},
  year         = {2007},
  url          = {http://arxiv.org/abs/0710.4658},
  eprinttype    = {arXiv},
  eprint       = {0710.4658},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-0710-4658.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cf/MolnosCHE06,
  author       = {Anca Mariana Molnos and
                  Sorin Dan Cotofana and
                  Marc J. M. Heijligers and
                  Jos T. J. van Eijndhoven},
  title        = {Static cache partitioning robustness analysis for embedded on-chip
                  multi-processors},
  booktitle    = {Proceedings of the Third Conference on Computing Frontiers, 2006,
                  Ischia, Italy, May 3-5, 2006},
  pages        = {353--360},
  publisher    = {{ACM}},
  year         = {2006},
  url          = {https://doi.org/10.1145/1128022.1128069},
  doi          = {10.1145/1128022.1128069},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/cf/MolnosCHE06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/MolnosHCE06,
  author       = {Anca Mariana Molnos and
                  Marc J. M. Heijligers and
                  Sorin Dan Cotofana and
                  Jos T. J. van Eijndhoven},
  editor       = {Georges G. E. Gielen},
  title        = {Compositional, efficient caches for a chip multi-processor},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {345--350},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243734},
  doi          = {10.1109/DATE.2006.243734},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/MolnosHCE06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/MolnosCHE06,
  author       = {Anca Mariana Molnos and
                  Sorin Dan Cotofana and
                  Marc J. M. Heijligers and
                  Jos T. J. van Eijndhoven},
  editor       = {Georgi Gaydadjiev and
                  C. John Glossner and
                  Jarmo Takala and
                  Stamatis Vassiliadis},
  title        = {Throughput optimization via cache partitioning for embedded multiprocessors},
  booktitle    = {Proceedings of 2006 International Conference on Embedded Computer
                  Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2006),
                  Samos, Greece, July 17-20, 2006},
  pages        = {185--192},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ICSAMOS.2006.300826},
  doi          = {10.1109/ICSAMOS.2006.300826},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/MolnosCHE06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/MolnosHCE05,
  author       = {Anca Mariana Molnos and
                  Marc J. M. Heijligers and
                  Sorin Dan Cotofana and
                  Jos T. J. van Eijndhoven},
  title        = {Compositional Memory Systems for Multimedia Communicating Tasks},
  booktitle    = {2005 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2005), 7-11 March 2005, Munich, Germany},
  pages        = {932--937},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/DATE.2005.99},
  doi          = {10.1109/DATE.2005.99},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/MolnosHCE05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/CoccoDHHH04,
  author       = {Mauro Cocco and
                  John Dielissen and
                  Marc J. M. Heijligers and
                  Andries Hekstra and
                  Jos Huisken},
  title        = {A Scalable Architecture for {LDPC} Decodin},
  booktitle    = {2004 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2004), 16-20 February 2004, Paris, France},
  pages        = {88--95},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/DATE.2004.1269212},
  doi          = {10.1109/DATE.2004.1269212},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/CoccoDHHH04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/MolnosHCE04,
  author       = {Anca Mariana Molnos and
                  Marc J. M. Heijligers and
                  Sorin Cotofana and
                  Jos T. J. van Eijndhoven},
  title        = {Compositional Memory Systems for Data Intensive Applications},
  booktitle    = {2004 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2004), 16-20 February 2004, Paris, France},
  pages        = {728--729},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/DATE.2004.1268950},
  doi          = {10.1109/DATE.2004.1268950},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/MolnosHCE04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/patmos/ArtsEHMTBMMMB03,
  author       = {B. Arts and
                  N. van der Eng and
                  Marc J. M. Heijligers and
                  H. Munk and
                  Frans Theeuwen and
                  Luca Benini and
                  Enrico Macii and
                  A. Milia and
                  Roberto Maro and
                  A. Bellu},
  editor       = {Jorge Juan{-}Chico and
                  Enrico Macii},
  title        = {Statistical Power Estimation of Behavioral Descriptions},
  booktitle    = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
                  and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
                  Italy, September 10-12, 2003, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2799},
  pages        = {197--207},
  publisher    = {Springer},
  year         = {2003},
  url          = {https://doi.org/10.1007/978-3-540-39762-5\_26},
  doi          = {10.1007/978-3-540-39762-5\_26},
  timestamp    = {Tue, 14 May 2019 10:00:54 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/ArtsEHMTBMMMB03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SantosHEEJ00,
  author       = {Luiz C. V. dos Santos and
                  Marc J. M. Heijligers and
                  C. A. J. van Eijk and
                  J. Van Eijnhoven and
                  Jochen A. G. Jess},
  title        = {A code-motion pruning technique for global scheduling},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {5},
  number       = {1},
  pages        = {1--38},
  year         = {2000},
  url          = {https://doi.org/10.1145/329458.329461},
  doi          = {10.1145/329458.329461},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SantosHEEJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isss/SantosHEEJ96,
  author       = {Luiz C. V. dos Santos and
                  Marc J. M. Heijligers and
                  C. A. J. van Eijk and
                  Jos T. J. van Eijndhoven and
                  Jochen A. G. Jess},
  title        = {A Constructive Method for Exploiting Code Motion},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {51--56},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565877},
  doi          = {10.1109/ISSS.1996.565877},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SantosHEEJ96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/HeijligersCJ95,
  author       = {Marc J. M. Heijligers and
                  L. J. M. Cluitmans and
                  Jochen A. G. Jess},
  editor       = {Isao Shirakawa},
  title        = {High-level synthesis scheduling and allocation using genetic algorithms},
  booktitle    = {Proceedings of the 1995 Conference on Asia Pacific Design Automation,
                  Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224818.224842},
  doi          = {10.1145/224818.224842},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/HeijligersCJ95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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