BibTeX records: Lars Hedrich

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@inproceedings{DBLP:conf/date/SchmalhoferMKSH23,
  author       = {Sascha Schmalhofer and
                  Marwin M{\"{o}}ller and
                  Nikoletta Katsaouni and
                  Marcel H. Schulz and
                  Lars Hedrich},
  title        = {Debugging Low Power Analog Neural Networks for Edge Computing},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/DATE56975.2023.10137199},
  doi          = {10.23919/DATE56975.2023.10137199},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/SchmalhoferMKSH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/array/KatsaouniAKSHS22,
  author       = {Nikoletta Katsaouni and
                  Florian Aul and
                  Lukas Krischker and
                  Sascha Schmalhofer and
                  Lars Hedrich and
                  Marcel H. Schulz},
  title        = {Energy efficient convolutional neural networks for arrhythmia detection},
  journal      = {Array},
  volume       = {13},
  pages        = {100127},
  year         = {2022},
  url          = {https://doi.org/10.1016/j.array.2022.100127},
  doi          = {10.1016/J.ARRAY.2022.100127},
  timestamp    = {Fri, 01 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/array/KatsaouniAKSHS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccwc/TarrafH21,
  author       = {Ahmad Tarraf and
                  Lars Hedrich},
  title        = {Towards Compositional Abstraction of Analog Neuronal Networks},
  booktitle    = {11th {IEEE} Annual Computing and Communication Workshop and Conference,
                  {CCWC} 2021, Las Vegas, NV, USA, January 27-30, 2021},
  pages        = {34--37},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/CCWC51732.2021.9376068},
  doi          = {10.1109/CCWC51732.2021.9376068},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ccwc/TarrafH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/it/TarrafH20,
  author       = {Ahmad Tarraf and
                  Lars Hedrich},
  title        = {From transistor level to cyber physical/hybrid systems: Formal verification
                  using automatic compositional abstraction},
  journal      = {it Inf. Technol.},
  volume       = {62},
  number       = {5-6},
  pages        = {257--270},
  year         = {2020},
  url          = {https://doi.org/10.1515/itit-2020-0004},
  doi          = {10.1515/ITIT-2020-0004},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/it/TarrafH20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KochdumperTROHA20,
  author       = {Niklas Kochdumper and
                  Ahmad Tarraf and
                  Malgorzata Rechmal and
                  Markus Olbrich and
                  Lars Hedrich and
                  Matthias Althoff},
  title        = {Establishing Reachset Conformance for the Formal Analysis of Analog
                  Circuits},
  booktitle    = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2020, Beijing, China, January 13-16, 2020},
  pages        = {199--204},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ASP-DAC47756.2020.9045120},
  doi          = {10.1109/ASP-DAC47756.2020.9045120},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/KochdumperTROHA20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/TarrafHKRO20,
  author       = {Ahmad Tarraf and
                  Lars Hedrich and
                  Niklas Kochdumper and
                  Malgorzata Rechmal{-}Lesse and
                  Markus Olbrich},
  title        = {Equivalence Checking Methods for Analog Circuits Using Continuous
                  Reachable Sets},
  booktitle    = {2020 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2020,
                  Limassol, Cyprus, July 6-8, 2020},
  pages        = {7--12},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISVLSI49217.2020.00012},
  doi          = {10.1109/ISVLSI49217.2020.00012},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isvlsi/TarrafHKRO20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TarrafH19,
  author       = {Ahmad Tarraf and
                  Lars Hedrich},
  editor       = {J{\"{u}}rgen Teich and
                  Franco Fummi},
  title        = {Behavioral Modeling of Transistor-Level Circuits using Automatic Abstraction
                  to Hybrid Automata},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2019, Florence, Italy, March 25-29, 2019},
  pages        = {1451--1456},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/DATE.2019.8715184},
  doi          = {10.23919/DATE.2019.8715184},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/TarrafH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmla/ErduranMHTRS19,
  author       = {{\"{O}}mer Ibrahim Erduran and
                  Mirjam Minor and
                  Lars Hedrich and
                  Ahmad Tarraf and
                  Frederik Ruehl and
                  Hans Schroth},
  editor       = {M. Arif Wani and
                  Taghi M. Khoshgoftaar and
                  Dingding Wang and
                  Huanjing Wang and
                  Naeem Seliya},
  title        = {Multi-agent Learning for Energy-Aware Placement of Autonomous Vehicles},
  booktitle    = {18th {IEEE} International Conference On Machine Learning And Applications,
                  {ICMLA} 2019, Boca Raton, FL, USA, December 16-19, 2019},
  pages        = {1671--1678},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ICMLA.2019.00273},
  doi          = {10.1109/ICMLA.2019.00273},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icmla/ErduranMHTRS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isse2/KolluruDH19,
  author       = {Yashwant Kolluru and
                  Rolando D{\"{o}}lling and
                  Lars Hedrich},
  title        = {Numerical Simulations of Vibro-acoustic Behaviors related to Drive
                  Train Assemblies},
  booktitle    = {International Symposium on Systems Engineering, {ISSE} 2019, Edinburgh,
                  United Kingdom, October 1-3, 2019},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISSE46696.2019.8984458},
  doi          = {10.1109/ISSE46696.2019.8984458},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isse2/KolluruDH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smacd/TarrafH19,
  author       = {Ahmad Tarraf and
                  Lars Hedrich},
  title        = {Automatic Modeling of Transistor Level Circuits by Hybrid Systems
                  with Parameter Variable Matrices},
  booktitle    = {16th International Conference on Synthesis, Modeling, Analysis and
                  Simulation Methods and Applications to Circuit Design, {SMACD} 2019,
                  Lausanne, Switzerland, July 15-18, 2019},
  pages        = {133--136},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/SMACD.2019.8795271},
  doi          = {10.1109/SMACD.2019.8795271},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/smacd/TarrafH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/TertelH18,
  author       = {Philipp Tertel and
                  Lars Hedrich},
  title        = {Real-time emulation of block-based analog circuits on an {FPGA}},
  journal      = {Integr.},
  volume       = {63},
  pages        = {373--382},
  year         = {2018},
  url          = {https://doi.org/10.1016/j.vlsi.2018.01.008},
  doi          = {10.1016/J.VLSI.2018.01.008},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/TertelH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/FurtigG0HHLNORS17,
  author       = {Andreas Furtig and
                  Georg Glaeser and
                  Christoph Grimm and
                  Lars Hedrich and
                  Stefan Heinen and
                  Hyun{-}Sek Lukas Lee and
                  Gregor Nitsche and
                  Markus Olbrich and
                  Carna Radojicic and
                  Fabian Speicher},
  editor       = {Manfred Dietrich and
                  Ondrej Nov{\'{a}}k},
  title        = {Novel metrics for Analog Mixed-Signal coverage},
  booktitle    = {20th {IEEE} International Symposium on Design and Diagnostics of Electronic
                  Circuits {\&} Systems, {DDECS} 2017, Dresden, Germany, April 19-21,
                  2017},
  pages        = {97--102},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/DDECS.2017.7934589},
  doi          = {10.1109/DDECS.2017.7934589},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/ddecs/FurtigG0HHLNORS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smacd/FurtigPH17,
  author       = {Andreas Furtig and
                  Moritz Paschke and
                  Lars Hedrich},
  title        = {Comparing code coverage metrics for analog behavioral models},
  booktitle    = {14th International Conference on Synthesis, Modeling, Analysis and
                  Simulation Methods and Applications to Circuit Design, {SMACD} 2017,
                  Giardini Naxos, Italy, June 12-15, 2017},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/SMACD.2017.7981563},
  doi          = {10.1109/SMACD.2017.7981563},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/smacd/FurtigPH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smacd/TertelH17,
  author       = {Philipp Tertel and
                  Lars Hedrich},
  title        = {Real-time emulation of block-based analog circuits on an {FPGA}},
  booktitle    = {14th International Conference on Synthesis, Modeling, Analysis and
                  Simulation Methods and Applications to Circuit Design, {SMACD} 2017,
                  Giardini Naxos, Italy, June 12-15, 2017},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/SMACD.2017.7981562},
  doi          = {10.1109/SMACD.2017.7981562},
  timestamp    = {Wed, 29 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/smacd/TertelH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BarkeFG0HHHLNNO16,
  author       = {Erich Barke and
                  Andreas Furtig and
                  Georg Glaeser and
                  Christoph Grimm and
                  Lars Hedrich and
                  Stefan Heinen and
                  Eckhard Hennig and
                  Hyun{-}Sek Lukas Lee and
                  Wolfgang Nebel and
                  Gregor Nitsche and
                  Markus Olbrich and
                  Carna Radojicic and
                  Fabian Speicher},
  editor       = {Luca Fanucci and
                  J{\"{u}}rgen Teich},
  title        = {Embedded tutorial: Analog-/mixed-signal verification methods for {AMS}
                  coverage analysis},
  booktitle    = {2016 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
  pages        = {1102--1111},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://ieeexplore.ieee.org/document/7459473/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/BarkeFG0HHHLNNO16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/FurtigSH16,
  author       = {Andreas Furtig and
                  Sebastian Steinhorst and
                  Lars Hedrich},
  editor       = {Rolf Drechsler and
                  Robert Wille},
  title        = {Feature based state space coverage of analog circuits},
  booktitle    = {2016 Forum on Specification and Design Languages, {FDL} 2016, Bremen,
                  Germany, September 14-16, 2016},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/FDL.2016.7880388},
  doi          = {10.1109/FDL.2016.7880388},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/FurtigSH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/RosenSHBB15,
  author       = {Julius von Rosen and
                  Felix Salfelder and
                  Lars Hedrich and
                  Benjamin Betting and
                  Uwe Brinkschulte},
  title        = {A highly dependable self-adaptive mixed-signal multi-core system-on-chip
                  architecture},
  journal      = {Integr.},
  volume       = {48},
  pages        = {55--71},
  year         = {2015},
  url          = {https://doi.org/10.1016/j.vlsi.2014.04.001},
  doi          = {10.1016/J.VLSI.2014.04.001},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/RosenSHBB15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MeissnerH15,
  author       = {Markus Meissner and
                  Lars Hedrich},
  title        = {{FEATS:} Framework for Explorative Analog Topology Synthesis},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {34},
  number       = {2},
  pages        = {213--226},
  year         = {2015},
  url          = {https://doi.org/10.1109/TCAD.2014.2376987},
  doi          = {10.1109/TCAD.2014.2376987},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/MeissnerH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RosenMH15,
  author       = {Julius von Rosen and
                  Markus Meissner and
                  Lars Hedrich},
  editor       = {Wolfgang Nebel and
                  David Atienza},
  title        = {Semiautomatic implementation of a bioinspired reliable analog task
                  distribution architecture for multiple analog cores},
  booktitle    = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
                  Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
                  9-13, 2015},
  pages        = {912--915},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {http://dl.acm.org/citation.cfm?id=2757024},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/RosenMH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SalfelderH15,
  author       = {Felix Salfelder and
                  Lars Hedrich},
  editor       = {Wolfgang Nebel and
                  David Atienza},
  title        = {Ageing simulation of analogue circuits and systems using adaptive
                  transient evaluation},
  booktitle    = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
                  Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
                  9-13, 2015},
  pages        = {1261--1264},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {http://dl.acm.org/citation.cfm?id=2757105},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/SalfelderH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isse2/DackermannDH15,
  author       = {Tim Dackermann and
                  Rolando D{\"{o}}lling and
                  Lars Hedrich},
  title        = {Method for system level vibro-acoustic gear modeling and simulation
                  of electro-mechanical drive trains},
  booktitle    = {{IEEE} International Symposium on Systems Engineering, {ISSE} 2015,
                  Rome, Italy, September 28-30, 2015},
  pages        = {60--65},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SysEng.2015.7302733},
  doi          = {10.1109/SYSENG.2015.7302733},
  timestamp    = {Thu, 04 Nov 2021 09:46:40 +0100},
  biburl       = {https://dblp.org/rec/conf/isse2/DackermannDH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/MaHS14,
  author       = {Mingyu Ma and
                  Lars Hedrich and
                  Christian Sporrer},
  title        = {ASDeX: a formal specification for analog circuit enabling a full automated
                  design validation},
  journal      = {Des. Autom. Embed. Syst.},
  volume       = {18},
  number       = {1-2},
  pages        = {99--118},
  year         = {2014},
  url          = {https://doi.org/10.1007/s10617-012-9088-8},
  doi          = {10.1007/S10617-012-9088-8},
  timestamp    = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dafes/MaHS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/BettingRHB13,
  author       = {Benjamin Betting and
                  Julius von Rosen and
                  Lars Hedrich and
                  Uwe Brinkschulte},
  editor       = {Hana Kub{\'{a}}tov{\'{a}} and
                  Christian Hochberger and
                  Martin Danek and
                  Bernhard Sick},
  title        = {A Highly Dependable Self-adaptive Mixed-Signal Multi-core System-on-Chip},
  booktitle    = {Architecture of Computing Systems - {ARCS} 2013 - 26th International
                  Conference, Prague, Czech Republic, February 19-22, 2013. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {7767},
  pages        = {122--133},
  publisher    = {Springer},
  year         = {2013},
  url          = {https://doi.org/10.1007/978-3-642-36424-2\_11},
  doi          = {10.1007/978-3-642-36424-2\_11},
  timestamp    = {Tue, 14 May 2019 10:00:52 +0200},
  biburl       = {https://dblp.org/rec/conf/arcs/BettingRHB13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KauerNSLCH13,
  author       = {Matthias Kauer and
                  Swaminathan Naranayaswami and
                  Sebastian Steinhorst and
                  Martin Lukasiewycz and
                  Samarjit Chakraborty and
                  Lars Hedrich},
  title        = {Modular system-level architecture for concurrent cell balancing},
  booktitle    = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
                  TX, USA, May 29 - June 07, 2013},
  pages        = {155:1--155:10},
  publisher    = {{ACM}},
  year         = {2013},
  url          = {https://doi.org/10.1145/2463209.2488926},
  doi          = {10.1145/2463209.2488926},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/KauerNSLCH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MeissnerMLH12,
  author       = {Markus Meissner and
                  Oliver Mitea and
                  Linda Luy and
                  Lars Hedrich},
  editor       = {Wolfgang Rosenstiel and
                  Lothar Thiele},
  title        = {Fast isomorphism testing for a graph-based analog circuit synthesis
                  framework},
  booktitle    = {2012 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
  pages        = {757--762},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/DATE.2012.6176570},
  doi          = {10.1109/DATE.2012.6176570},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/MeissnerMLH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/SteinhorstH12,
  author       = {Sebastian Steinhorst and
                  Lars Hedrich},
  title        = {Analog assertion-based verification on partial state space representations
                  using {ASL}},
  booktitle    = {Proceeding of the 2012 Forum on Specification and Design Languages,
                  Vienna, Austria, September 18-20, 2012},
  pages        = {98--104},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://ieeexplore.ieee.org/document/6336992/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/SteinhorstH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SteinhorstH12,
  author       = {Sebastian Steinhorst and
                  Lars Hedrich},
  editor       = {Alan J. Hu},
  title        = {Trajectory-Directed discrete state space modeling for formal verification
                  of nonlinear analog circuits},
  booktitle    = {2012 {IEEE/ACM} International Conference on Computer-Aided Design,
                  {ICCAD} 2012, San Jose, CA, USA, November 5-8, 2012},
  pages        = {202--209},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2429384.2429423},
  doi          = {10.1145/2429384.2429423},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/SteinhorstH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isorc/LeineweberPBRBH12,
  author       = {Christoph Leineweber and
                  Mathias Pacher and
                  Benjamin Betting and
                  Julius von Rosen and
                  Uwe Brinkschulte and
                  Lars Hedrich},
  editor       = {Chunming Hu and
                  Gabor Karsai and
                  Jie Xu and
                  Andreas Polze and
                  Ji Wang and
                  Andy J. Wellings},
  title        = {Detection and Defense Strategies against Attacks on an Artificial
                  Hormone System Running on a Mixed Signal Chip},
  booktitle    = {15th {IEEE} International Symposium on Object/Component/Service-Oriented
                  Real-Time Distributed Computing, {ISORC} 2012, Shenzhen, China, April
                  11-13, 2012},
  pages        = {135--143},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISORC.2012.26},
  doi          = {10.1109/ISORC.2012.26},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isorc/LeineweberPBRBH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SteinhorstH12,
  author       = {Sebastian Steinhorst and
                  Lars Hedrich},
  editor       = {Srinivas Katkoori and
                  Matthew R. Guthaus and
                  Ayse K. Coskun and
                  Andreas Burg and
                  Ricardo Reis},
  title        = {Equivalence checking of nonlinear analog circuits for hierarchical
                  {AMS} System Verification},
  booktitle    = {20th {IEEE/IFIP} International Conference on {VLSI} and System-on-Chip,
                  VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012},
  pages        = {135--140},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/VLSI-SoC.2012.6379019},
  doi          = {10.1109/VLSI-SOC.2012.6379019},
  timestamp    = {Tue, 06 Sep 2022 16:02:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/SteinhorstH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/HenkelBBBBCEEHHHKLMPRSSTTWW11,
  author       = {J{\"{o}}rg Henkel and
                  Lars Bauer and
                  Joachim Becker and
                  Oliver Bringmann and
                  Uwe Brinkschulte and
                  Samarjit Chakraborty and
                  Michael Engel and
                  Rolf Ernst and
                  Hermann H{\"{a}}rtig and
                  Lars Hedrich and
                  Andreas Herkersdorf and
                  R{\"{u}}diger Kapitza and
                  Daniel Lohmann and
                  Peter Marwedel and
                  Marco Platzner and
                  Wolfgang Rosenstiel and
                  Ulf Schlichtmann and
                  Olaf Spinczyk and
                  Mehdi Baradaran Tahoori and
                  J{\"{u}}rgen Teich and
                  Norbert Wehn and
                  Hans{-}Joachim Wunderlich},
  editor       = {Robert P. Dick and
                  Jan Madsen},
  title        = {Design and architectures for dependable embedded systems},
  booktitle    = {Proceedings of the 9th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11
                  Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011},
  pages        = {69--78},
  publisher    = {{ACM}},
  year         = {2011},
  url          = {https://doi.org/10.1145/2039370.2039384},
  doi          = {10.1145/2039370.2039384},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/codes/HenkelBBBBCEEHHHKLMPRSSTTWW11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MiteaMHJ11,
  author       = {Oliver Mitea and
                  Markus Meissner and
                  Lars Hedrich and
                  P. Jores},
  title        = {Automated constraint-driven topology synthesis for analog circuits},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
                  March 14-18, 2011},
  pages        = {1662--1665},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/DATE.2011.5763264},
  doi          = {10.1109/DATE.2011.5763264},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/MiteaMHJ11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/MaHS11,
  author       = {Mingyu Ma and
                  Lars Hedrich and
                  Christian Sporrer},
  title        = {A machine-readable specification of analog circuits for integration
                  into a validation flow},
  booktitle    = {2011 Forum on Specification {\&} Design Languages, {FDL} 2011,
                  Oldenburg, Germany, September 13-15, 2011},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://ieeexplore.ieee.org/document/6069469/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/MaHS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MiteaMH11,
  author       = {Oliver Mitea and
                  Markus Meissner and
                  Lars Hedrich},
  title        = {Topology synthesis of analog circuits with yield optimization and
                  evaluation using pareto fronts},
  booktitle    = {{IEEE/IFIP} 19th International Conference on {VLSI} and System-on-Chip,
                  VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011},
  pages        = {78--81},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/VLSISoC.2011.6081651},
  doi          = {10.1109/VLSISOC.2011.6081651},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/MiteaMH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/SteinhorstH10,
  author       = {Sebastian Steinhorst and
                  Lars Hedrich},
  title        = {Advanced methods for equivalence checking of analog circuits with
                  strong nonlinearities},
  journal      = {Formal Methods Syst. Des.},
  volume       = {36},
  number       = {2},
  pages        = {131--147},
  year         = {2010},
  url          = {https://doi.org/10.1007/s10703-009-0086-9},
  doi          = {10.1007/S10703-009-0086-9},
  timestamp    = {Fri, 13 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/fmsd/SteinhorstH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LammermannRKRVJH10,
  author       = {Stefan L{\"{a}}mmermann and
                  J{\"{u}}rgen Ruf and
                  Thomas Kropf and
                  Wolfgang Rosenstiel and
                  Alexander Viehl and
                  Alexander Jesser and
                  Lars Hedrich},
  editor       = {Giovanni De Micheli and
                  Bashir M. Al{-}Hashimi and
                  Wolfgang M{\"{u}}ller and
                  Enrico Macii},
  title        = {Towards assertion-based verification of heterogeneous system designs},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
                  March 8-12, 2010},
  pages        = {1171--1176},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/DATE.2010.5456985},
  doi          = {10.1109/DATE.2010.5456985},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/LammermannRKRVJH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SteinhorstH10,
  author       = {Sebastian Steinhorst and
                  Lars Hedrich},
  title        = {Improving verification coverage of analog circuit blocks by state
                  space-guided transient simulation},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {645--648},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5537507},
  doi          = {10.1109/ISCAS.2010.5537507},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SteinhorstH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BarkeGGHHPSW09,
  author       = {Erich Barke and
                  Darius Grabowski and
                  Helmut Graeb and
                  Lars Hedrich and
                  Stefan Heinen and
                  Ralf Popp and
                  Sebastian Steinhorst and
                  Yifan Wang},
  editor       = {Luca Benini and
                  Giovanni De Micheli and
                  Bashir M. Al{-}Hashimi and
                  Wolfgang M{\"{u}}ller},
  title        = {Formal approaches to analog circuit verification},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
                  April 20-24, 2009},
  pages        = {724--729},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {http://dl.acm.org/citation.cfm?id=1874798},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/date/BarkeGGHHPSW09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/JesserLPWRHFKR08,
  author       = {Alexander Jesser and
                  Stefan L{\"{a}}mmermann and
                  Alexander Pacholik and
                  Roland Weiss and
                  J{\"{u}}rgen Ruf and
                  Lars Hedrich and
                  Wolfgang Fengler and
                  Thomas Kropf and
                  Wolfgang Rosenstiel},
  title        = {Advanced Assertion-Based Design for Mixed-Signal Verification},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {91-A},
  number       = {12},
  pages        = {3548--3555},
  year         = {2008},
  url          = {https://doi.org/10.1093/ietfec/e91-a.12.3548},
  doi          = {10.1093/IETFEC/E91-A.12.3548},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/JesserLPWRHFKR08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JesserH08,
  author       = {Alexander Jesser and
                  Lars Hedrich},
  editor       = {Chong{-}Min Kyung and
                  Kiyoung Choi and
                  Soonhoi Ha},
  title        = {A symbolic approach for mixed-signal model checking},
  booktitle    = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
                  {ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
  pages        = {404--409},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ASPDAC.2008.4483984},
  doi          = {10.1109/ASPDAC.2008.4483984},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/JesserH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SteinhorstH08,
  author       = {Sebastian Steinhorst and
                  Lars Hedrich},
  editor       = {Donatella Sciuto},
  title        = {Model Checking of Analog Systems using an Analog Specification Language},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
                  March 10-14, 2008},
  pages        = {324--329},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1109/DATE.2008.4484700},
  doi          = {10.1109/DATE.2008.4484700},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/SteinhorstH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WangH08,
  author       = {Xiaoying Wang and
                  Lars Hedrich},
  editor       = {Donatella Sciuto},
  title        = {Structural Synthesis of Four-Quadrant Multiplier Based on Hierarchical
                  Topology},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
                  March 10-14, 2008},
  pages        = {800--803},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1109/DATE.2008.4484915},
  doi          = {10.1109/DATE.2008.4484915},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/WangH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WangH06,
  author       = {Xiaoying Wang and
                  Lars Hedrich},
  editor       = {Fumiyasu Hirose},
  title        = {An approach to topology synthesis of analog circuits using hierarchical
                  blocks and symbolic analysis},
  booktitle    = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
                  {ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
  pages        = {700--705},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ASPDAC.2006.1594768},
  doi          = {10.1109/ASPDAC.2006.1594768},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/WangH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangH06a,
  author       = {Xiaoying Wang and
                  Lars Hedrich},
  title        = {Hierarchical exploration and selection of transistor-topologies for
                  analog circuit design},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1692873},
  doi          = {10.1109/ISCAS.2006.1692873},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangH06a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/JesserWHK06,
  author       = {Alexander Jesser and
                  Markus Wedler and
                  Lars Hedrich and
                  Wolfgang Kunz},
  editor       = {Bernd Straube and
                  Martin Freibothe},
  title        = {A case study on applying bounded model checking to analog circuit
                  verification},
  booktitle    = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
                  von Schaltungen und Systemen (MBMV), Dresden, Germany, February 20-22,
                  2006},
  pages        = {106--113},
  publisher    = {Fraunhofer Institut f{\"{u}}r Integrierte Schaltungen},
  year         = {2006},
  timestamp    = {Thu, 28 Jun 2012 09:12:11 +0200},
  biburl       = {https://dblp.org/rec/conf/mbmv/JesserWHK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/KlausenHB06,
  author       = {Ralf Klausen and
                  Lars Hedrich and
                  Erich Barke},
  editor       = {Bernd Straube and
                  Martin Freibothe},
  title        = {Vermeidung fehlerhafter Verifikations-Ergebnisse beim {\"{A}}quivalenz-Vergleich
                  nichtlinearer analoger Schaltungen},
  booktitle    = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
                  von Schaltungen und Systemen (MBMV), Dresden, Germany, February 20-22,
                  2006},
  pages        = {122--131},
  publisher    = {Fraunhofer Institut f{\"{u}}r Integrierte Schaltungen},
  year         = {2006},
  timestamp    = {Thu, 28 Jun 2012 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mbmv/KlausenHB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/entcs/GrabowskiPHB06,
  author       = {Darius Grabowski and
                  Daniel Platte and
                  Lars Hedrich and
                  Erich Barke},
  editor       = {Oded Maler},
  title        = {Time Constrained Verification of Analog Circuits using Model-Checking
                  Algorithms},
  booktitle    = {Proceedings of the First Workshop on Formal Verification of Analog
                  Circuits, {FAC} 2005, Edinburgh, UK, April 9, 2005},
  series       = {Electronic Notes in Theoretical Computer Science},
  volume       = {153},
  number       = {3},
  pages        = {37--52},
  publisher    = {Elsevier},
  year         = {2005},
  url          = {https://doi.org/10.1016/j.entcs.2006.01.026},
  doi          = {10.1016/J.ENTCS.2006.01.026},
  timestamp    = {Fri, 20 Jan 2023 10:54:35 +0100},
  biburl       = {https://dblp.org/rec/journals/entcs/GrabowskiPHB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NathkeBHB04,
  author       = {Lutz N{\"{a}}thke and
                  Volodymyr Burkhay and
                  Lars Hedrich and
                  Erich Barke},
  title        = {Hierarchical Automatic Behavioral Model Generation of Nonlinear Analog
                  Circuits Based on Nonlinear Symbolic Techniques},
  booktitle    = {2004 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2004), 16-20 February 2004, Paris, France},
  pages        = {442--447},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/DATE.2004.1268886},
  doi          = {10.1109/DATE.2004.1268886},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/NathkeBHB04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/HartongHB02,
  author       = {Walter Hartong and
                  Lars Hedrich and
                  Erich Barke},
  editor       = {Ed Brinksma and
                  Kim Guldstrand Larsen},
  title        = {On Discrete Modeling and Model Checking for Nonlinear Analog Systems},
  booktitle    = {Computer Aided Verification, 14th International Conference, {CAV}
                  2002,Copenhagen, Denmark, July 27-31, 2002, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2404},
  pages        = {401--413},
  publisher    = {Springer},
  year         = {2002},
  url          = {https://doi.org/10.1007/3-540-45657-0\_33},
  doi          = {10.1007/3-540-45657-0\_33},
  timestamp    = {Tue, 14 May 2019 10:00:43 +0200},
  biburl       = {https://dblp.org/rec/conf/cav/HartongHB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HartongHB02,
  author       = {Walter Hartong and
                  Lars Hedrich and
                  Erich Barke},
  title        = {Model checking algorithms for analog verification},
  booktitle    = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
                  New Orleans, LA, USA, June 10-14, 2002},
  pages        = {542--547},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/513918.514055},
  doi          = {10.1145/513918.514055},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/HartongHB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PoppOHB02,
  author       = {Ralf Popp and
                  Joerg Oehmen and
                  Lars Hedrich and
                  Erich Barke},
  title        = {Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog
                  Circuits},
  booktitle    = {2002 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2002), 4-8 March 2002, Paris, France},
  pages        = {274--278},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/DATE.2002.998284},
  doi          = {10.1109/DATE.2002.998284},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/PoppOHB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HartongHB02,
  author       = {Walter Hartong and
                  Lars Hedrich and
                  Erich Barke},
  title        = {An Approach to Model Checking for Nonlinear Analog Systems},
  booktitle    = {2002 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2002), 4-8 March 2002, Paris, France},
  pages        = {1080},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/DATE.2002.998436},
  doi          = {10.1109/DATE.2002.998436},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/HartongHB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LemkeHB02,
  author       = {Andreas C. Lemke and
                  Lars Hedrich and
                  Erich Barke},
  editor       = {Lawrence T. Pileggi and
                  Andreas Kuehlmann},
  title        = {Analog circuit sizing based on formal methods using affine arithmetic},
  booktitle    = {Proceedings of the 2002 {IEEE/ACM} International Conference on Computer-aided
                  Design, {ICCAD} 2002, San Jose, California, USA, November 10-14, 2002},
  pages        = {486--489},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1145/774572.774643},
  doi          = {10.1145/774572.774643},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/LemkeHB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AdlerBHB00,
  author       = {Thorsten Adler and
                  Hiltrud Brocke and
                  Lars Hedrich and
                  Erich Barke},
  editor       = {Giovanni De Micheli},
  title        = {A current driven routing and verification methodology for analog applications},
  booktitle    = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
                  CA, USA, June 5-9, 2000},
  pages        = {385--389},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/337292.337505},
  doi          = {10.1145/337292.337505},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/AdlerBHB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/casc/WichmannPHH99,
  author       = {Tim Wichmann and
                  Ralf Popp and
                  Walter Hartong and
                  Lars Hedrich},
  editor       = {Victor G. Ganzha and
                  Ernst W. Mayr and
                  Evgenii V. Vorozhtsov},
  title        = {On the Simplification of Nonlinear {DAE} Systems in Analog Circuit
                  Design},
  booktitle    = {Proceedings of the Second Workshop on Computer Algebra in Scientific
                  Computing, {CASC} 1999, Munich, Germany, May 31 - June 4, 1999},
  pages        = {485--498},
  publisher    = {Springer},
  year         = {1999},
  url          = {https://doi.org/10.1007/978-3-642-60218-4\_37},
  doi          = {10.1007/978-3-642-60218-4\_37},
  timestamp    = {Tue, 25 Jun 2019 15:50:01 +0200},
  biburl       = {https://dblp.org/rec/conf/casc/WichmannPHH99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HedrichB98,
  author       = {Lars Hedrich and
                  Erich Barke},
  editor       = {Patrick M. Dewilde and
                  Franz J. Rammig and
                  Gerry Musgrave},
  title        = {A Formal Approach to Verification of Linear Analog Circuits with Parameter
                  Tolerances},
  booktitle    = {1998 Design, Automation and Test in Europe {(DATE} '98), February
                  23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
  pages        = {649--654},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/DATE.1998.655927},
  doi          = {10.1109/DATE.1998.655927},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/HedrichB98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Hedrich97,
  author       = {Lars Hedrich},
  title        = {Ans{\"{a}}tze zur formalen Verifikation analoger Schaltungen},
  school       = {University of Hanover},
  year         = {1997},
  url          = {https://d-nb.info/952223198},
  isbn         = {3-18-325720-3},
  timestamp    = {Sat, 17 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/phd/dnb/Hedrich97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BorchersHB96,
  author       = {Carsten Borchers and
                  Lars Hedrich and
                  Erich Barke},
  editor       = {Thomas Pennino and
                  Ellen J. Yoffa},
  title        = {Equation-Based Behavioral Model Generation for Nonlinear Analog Circuits},
  booktitle    = {Proceedings of the 33st Conference on Design Automation, Las Vegas,
                  Nevada, USA, Las Vegas Convention Center, June 3-7, 1996},
  pages        = {236--239},
  publisher    = {{ACM} Press},
  year         = {1996},
  url          = {https://doi.org/10.1145/240518.240562},
  doi          = {10.1145/240518.240562},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/BorchersHB96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HedrichB95,
  author       = {Lars Hedrich and
                  Erich Barke},
  editor       = {Richard L. Rudell},
  title        = {A formal approach to nonlinear analog circuit verification},
  booktitle    = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
                  Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
  pages        = {123--127},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1109/ICCAD.1995.480002},
  doi          = {10.1109/ICCAD.1995.480002},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/HedrichB95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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