Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Clarence L. Coates
@article{DBLP:journals/computer/HwangCGWBSC82,
author = {Kai Hwang and
William J. Croft and
George H. Goble and
Benjamin W. Wah and
Faye A. Briggs and
William R. Simmons and
Clarence L. Coates},
title = {A Unix-Based Local Computer Network with Load Balancing},
journal = {Computer},
volume = {15},
number = {4},
pages = {55--64},
year = {1982},
url = {https://doi.org/10.1109/MC.1982.1653998},
doi = {10.1109/MC.1982.1653998},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/HwangCGWBSC82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/UnderwoodC75,
author = {Stephen A. Underwood and
Clarence L. Coates},
title = {Visual Learning from Multiple Views},
journal = {{IEEE} Trans. Computers},
volume = {24},
number = {6},
pages = {651--661},
year = {1975},
url = {https://doi.org/10.1109/T-C.1975.224277},
doi = {10.1109/T-C.1975.224277},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/UnderwoodC75.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SungC74,
author = {Chia{-}Hsiaing Sung and
Clarence L. Coates},
title = {Tessellation Aspect of Combinational Cellular Array Testing},
journal = {{IEEE} Trans. Computers},
volume = {23},
number = {4},
pages = {363--369},
year = {1974},
url = {https://doi.org/10.1109/T-C.1974.223951},
doi = {10.1109/T-C.1974.223951},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/SungC74.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/SloanCM73,
author = {Martha E. Sloan and
Clarence L. Coates and
Edward J. McCluskey},
title = {Cosine survey of electrical engineering departments},
journal = {Computer},
volume = {6},
number = {6},
pages = {30--39},
year = {1973},
url = {https://doi.org/10.1109/MC.1973.6536796},
doi = {10.1109/MC.1973.6536796},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/SloanCM73.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HarlowC72,
author = {Charles A. Harlow and
Clarence L. Coates},
title = {Feedback in Sequential Machine Realizations},
journal = {{IEEE} Trans. Computers},
volume = {21},
number = {4},
pages = {371--381},
year = {1972},
url = {https://doi.org/10.1109/TC.1972.5008978},
doi = {10.1109/TC.1972.5008978},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HarlowC72.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HarlowC71,
author = {Charles A. Harlow and
Clarence L. Coates},
title = {Inessential Errors in Sequential Machines},
journal = {{IEEE} Trans. Computers},
volume = {20},
number = {6},
pages = {688--690},
year = {1971},
url = {https://doi.org/10.1109/T-C.1971.223328},
doi = {10.1109/T-C.1971.223328},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HarlowC71.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HadlockC69,
author = {Frank O. Hadlock and
Clarence L. Coates},
title = {Realization of Sequential Machines with Threshold Elements},
journal = {{IEEE} Trans. Computers},
volume = {18},
number = {5},
pages = {428--439},
year = {1969},
url = {https://doi.org/10.1109/T-C.1969.222682},
doi = {10.1109/T-C.1969.222682},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HadlockC69.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HoweC68,
author = {A. Bart Howe and
Clarence L. Coates},
title = {Logic Hazards in Threshold Networks},
journal = {{IEEE} Trans. Computers},
volume = {17},
number = {3},
pages = {238--251},
year = {1968},
url = {https://doi.org/10.1109/TC.1968.229097},
doi = {10.1109/TC.1968.229097},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HoweC68.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BargainerC68,
author = {J. D. Bargainer Jr. and
Clarence L. Coates},
title = {Minimal Multiplexed Threshold Gate Realizations},
journal = {{IEEE} Trans. Computers},
volume = {17},
number = {6},
pages = {566--578},
year = {1968},
url = {https://doi.org/10.1109/TC.1968.226922},
doi = {10.1109/TC.1968.226922},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BargainerC68.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iandc/HarlowC67,
author = {Charles A. Harlow and
Clarence L. Coates},
title = {On the Structure of Realizations Using Flip-Flop Memory Elements},
journal = {Inf. Control.},
volume = {10},
number = {2},
pages = {159--174},
year = {1967},
url = {https://doi.org/10.1016/S0019-9958(67)80005-6},
doi = {10.1016/S0019-9958(67)80005-6},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iandc/HarlowC67.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BargainerC66,
author = {J. D. Bargainer Jr. and
Clarence L. Coates},
title = {Decimal Numbers for Checking Summability},
journal = {{IEEE} Trans. Electron. Comput.},
volume = {15},
number = {3},
pages = {372},
year = {1966},
url = {https://doi.org/10.1109/PGEC.1966.264496},
doi = {10.1109/PGEC.1966.264496},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BargainerC66.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/focs/HadlockC66,
author = {F. O. Hadlock and
C. L. Coates},
title = {Realization of Sequential Machines with Threshold Elements},
booktitle = {7th Annual Symposium on Switching and Automata Theory, Berkeley, California,
USA, October 23-25, 1966},
pages = {172--183},
publisher = {{IEEE} Computer Society},
year = {1966},
url = {https://doi.org/10.1109/SWAT.1966.18},
doi = {10.1109/SWAT.1966.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/focs/HadlockC66.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/focs/CoatesS65,
author = {C. L. Coates and
Vatana Supornpaibul},
title = {On maximum stability realizations of linearly separable Boolean functions},
booktitle = {6th Annual Symposium on Switching Circuit Theory and Logical Design,
Ann Arbor, Michigan, USA, October 6-8, 1965},
pages = {12--24},
publisher = {{IEEE} Computer Society},
year = {1965},
url = {https://doi.org/10.1109/FOCS.1965.18},
doi = {10.1109/FOCS.1965.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/focs/CoatesS65.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CoatesL64,
author = {Clarence L. Coates and
Philip M. Lewis II},
title = {{DONUT:} {A} Threshold Gate Computer},
journal = {{IEEE} Trans. Electron. Comput.},
volume = {13},
number = {3},
pages = {240--247},
year = {1964},
url = {https://doi.org/10.1109/PGEC.1964.263910},
doi = {10.1109/PGEC.1964.263910},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/CoatesL64.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LewisC63,
author = {Philip M. Lewis II and
Clarence L. Coates},
title = {Is Switching Theory Mathematics or Engineering?},
journal = {{IEEE} Trans. Electron. Comput.},
volume = {12},
number = {3},
pages = {320--321},
year = {1963},
url = {https://doi.org/10.1109/PGEC.1963.263574},
doi = {10.1109/PGEC.1963.263574},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LewisC63.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LewisC63a,
author = {Philip M. Lewis II and
Clarence L. Coates},
title = {Realization of Logical Functions by a Network of Threshold Components
with Specified Sensitivity},
journal = {{IEEE} Trans. Electron. Comput.},
volume = {12},
number = {5},
pages = {443--454},
year = {1963},
url = {https://doi.org/10.1109/PGEC.1963.263624},
doi = {10.1109/PGEC.1963.263624},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LewisC63a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CoatesL63,
author = {Clarence L. Coates and
Philip M. Lewis II},
title = {A Realization Procedure for Threshold Gate Networks},
journal = {{IEEE} Trans. Electron. Comput.},
volume = {12},
number = {5},
pages = {454--461},
year = {1963},
url = {https://doi.org/10.1109/PGEC.1963.263625},
doi = {10.1109/PGEC.1963.263625},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/CoatesL63.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/focs/CoatesL63,
author = {C. L. Coates and
Philip M. Lewis II},
title = {Threshold gate realizations of logical functions with don't cares},
booktitle = {4th Annual Symposium on Switching Circuit Theory and Logical Design,
Chicago, Illinois, USA, October 28-30, 1963},
pages = {41--52},
publisher = {{IEEE} Computer Society},
year = {1963},
url = {https://doi.org/10.1109/SWCT.1963.15},
doi = {10.1109/SWCT.1963.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/focs/CoatesL63.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CoatesKL62,
author = {Clarence L. Coates and
Roger B. Kirchner and
Philip M. Lewis II},
title = {A Simplified Procedure for the Realization of Linearly-Separable Switching
Functions},
journal = {{IRE} Trans. Electron. Comput.},
volume = {11},
number = {4},
pages = {447--458},
year = {1962},
url = {https://doi.org/10.1109/TEC.1962.5219383},
doi = {10.1109/TEC.1962.5219383},
timestamp = {Mon, 25 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/CoatesKL62.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/focs/LewisC62,
author = {Philip M. Lewis II and
C. L. Coates},
title = {A realization procedure for threshold gate networks},
booktitle = {3rd Annual Symposium on Switching Circuit Theory and Logical Design,
Chicago, Illinois, USA, October 7-12, 1962},
pages = {159--168},
publisher = {{IEEE} Computer Society},
year = {1962},
url = {https://doi.org/10.1109/FOCS.1962.2},
doi = {10.1109/FOCS.1962.2},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/focs/LewisC62.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2023-09-28 03:35 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
