BibTeX records: Sunil K. Chappidi

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@article{DBLP:journals/todaes/MohantyRC06,
  author       = {Saraju P. Mohanty and
                  N. Ranganathan and
                  Sunil K. Chappidi},
  title        = {{ILP} models for simultaneous energy and transient power minimization
                  during behavioral synthesis},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {11},
  number       = {1},
  pages        = {186--212},
  year         = {2006},
  url          = {https://doi.org/10.1145/1124713.1124725},
  doi          = {10.1145/1124713.1124725},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/MohantyRC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/MohantyRC04,
  author       = {Saraju P. Mohanty and
                  Nagarajan Ranganathan and
                  Sunil K. Chappidi},
  title        = {{ILP} Models for Energy and Transient Power Minimization During Behavioral
                  Synthesis},
  booktitle    = {17th International Conference on {VLSI} Design {(VLSI} Design 2004),
                  with the 3rd International Conference on Embedded Systems Design,
                  5-9 January 2004, Mumbai, India},
  pages        = {745--748},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/ICVD.2004.1261017},
  doi          = {10.1109/ICVD.2004.1261017},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MohantyRC04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/MohantyRC03,
  author       = {Saraju P. Mohanty and
                  N. Ranganathan and
                  Sunil K. Chappidi},
  editor       = {Mircea R. Stan and
                  David Garrett and
                  Kazuo Nakajima},
  title        = {Simultaneous peak and average power minimization during datapath scheduling
                  for {DSP} processors},
  booktitle    = {Proceedings of the 13th {ACM} Great Lakes Symposium on {VLSI} 2003,
                  Washington, DC, USA, April 28-29, 2003},
  pages        = {215--220},
  publisher    = {{ACM}},
  year         = {2003},
  url          = {https://doi.org/10.1145/764808.764864},
  doi          = {10.1145/764808.764864},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/MohantyRC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/MohantyRC03,
  author       = {Saraju P. Mohanty and
                  N. Ranganathan and
                  Sunil K. Chappidi},
  title        = {Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based
                  Datapath Scheduling},
  booktitle    = {21st International Conference on Computer Design {(ICCD} 2003),VLSI
                  in Computers and Processors, 13-15 October 2003, San Jose, CA, USA,
                  Proceedings},
  pages        = {441--443},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICCD.2003.1240937},
  doi          = {10.1109/ICCD.2003.1240937},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/MohantyRC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/MohantyRC03,
  author       = {Saraju P. Mohanty and
                  Nagarajan Ranganathan and
                  Sunil K. Chappidi},
  title        = {Transient power minimization through datapath scheduling in multiple
                  supply voltage environment},
  booktitle    = {Proceedings of the 2003 10th {IEEE} International Conference on Electronics,
                  Circuits and Systems, {ICECS} 2003, Sharjah, United Arab Emirates,
                  December 14-17, 2003},
  pages        = {300--303},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICECS.2003.1302036},
  doi          = {10.1109/ICECS.2003.1302036},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/MohantyRC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/MohantyRC03,
  author       = {Saraju P. Mohanty and
                  N. Ranganathan and
                  Sunil K. Chappidi},
  title        = {An ILP-based scheduling scheme for energy efficient high performance
                  datapath synthesis},
  booktitle    = {Proceedings of the 2003 International Symposium on Circuits and Systems,
                  {ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
  pages        = {313--316},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ISCAS.2003.1206265},
  doi          = {10.1109/ISCAS.2003.1206265},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MohantyRC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/MohantyRC03,
  author       = {Saraju P. Mohanty and
                  N. Ranganathan and
                  Sunil K. Chappidi},
  title        = {Peak Power Minimization Through Datapath Scheduling},
  booktitle    = {2003 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
                  2003), New Trends and Technologies for {VLSI} Systems Design, 20-21
                  February 2003, Tampa, FL, {USA}},
  pages        = {121--126},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ISVLSI.2003.1183362},
  doi          = {10.1109/ISVLSI.2003.1183362},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/MohantyRC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}