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BibTeX records: David Van Campenhout
@inproceedings{DBLP:conf/cav/EisnerFHLMC03, author = {Cindy Eisner and Dana Fisman and John Havlicek and Yoad Lustig and Anthony McIsaac and David Van Campenhout}, editor = {Warren A. Hunt Jr. and Fabio Somenzi}, title = {Reasoning with Temporal Logic on Truncated Paths}, booktitle = {Computer Aided Verification, 15th International Conference, {CAV} 2003, Boulder, CO, USA, July 8-12, 2003, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2725}, pages = {27--39}, publisher = {Springer}, year = {2003}, url = {https://doi.org/10.1007/978-3-540-45069-6\_3}, doi = {10.1007/978-3-540-45069-6\_3}, timestamp = {Tue, 14 May 2019 10:00:43 +0200}, biburl = {https://dblp.org/rec/conf/cav/EisnerFHLMC03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icalp/EisnerFHMC03, author = {Cindy Eisner and Dana Fisman and John Havlicek and Anthony McIsaac and David Van Campenhout}, editor = {Jos C. M. Baeten and Jan Karel Lenstra and Joachim Parrow and Gerhard J. Woeginger}, title = {The Definition of a Temporal Clock Operator}, booktitle = {Automata, Languages and Programming, 30th International Colloquium, {ICALP} 2003, Eindhoven, The Netherlands, June 30 - July 4, 2003. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2719}, pages = {857--870}, publisher = {Springer}, year = {2003}, url = {https://doi.org/10.1007/3-540-45061-0\_67}, doi = {10.1007/3-540-45061-0\_67}, timestamp = {Tue, 14 May 2019 10:00:44 +0200}, biburl = {https://dblp.org/rec/conf/icalp/EisnerFHMC03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/CampenhoutMH00, author = {David Van Campenhout and Trevor N. Mudge and John P. Hayes}, title = {Collection and Analysis of Microprocessor Design Errors}, journal = {{IEEE} Des. Test Comput.}, volume = {17}, number = {4}, pages = {51--60}, year = {2000}, url = {https://doi.org/10.1109/54.895006}, doi = {10.1109/54.895006}, timestamp = {Sun, 17 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/CampenhoutMH00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@phdthesis{DBLP:phd/us/Campenhout99, author = {David Van Campenhout}, title = {Functional design verification for microprocessors by error modeling}, school = {University of Michigan, {USA}}, year = {1999}, url = {http://hdl.handle.net/2027.42/132021}, timestamp = {Fri, 06 May 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/phd/us/Campenhout99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/CampenhoutMS99, author = {David Van Campenhout and Trevor N. Mudge and Karem A. Sakallah}, title = {Timing verification of sequential dynamic circuits}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {18}, number = {5}, pages = {645--658}, year = {1999}, url = {https://doi.org/10.1109/43.759081}, doi = {10.1109/43.759081}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/CampenhoutMS99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/CampenhoutMH99, author = {David Van Campenhout and Trevor N. Mudge and John P. Hayes}, editor = {Mary Jane Irwin}, title = {High-Level Test Generation for Design Verification of Pipelined Microprocessors}, booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999}, pages = {185--188}, publisher = {{ACM} Press}, year = {1999}, url = {https://doi.org/10.1145/309847.309912}, doi = {10.1145/309847.309912}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/CampenhoutMH99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/todaes/HugginsC98, author = {James K. Huggins and David Van Campenhout}, title = {Specification and verification of pipelining in the {ARM2} {RISC} microprocessor}, journal = {{ACM} Trans. Design Autom. Electr. Syst.}, volume = {3}, number = {4}, pages = {563--580}, year = {1998}, url = {https://doi.org/10.1145/296333.296345}, doi = {10.1145/296333.296345}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/todaes/HugginsC98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/todaes/CampenhoutAHMB98, author = {David Van Campenhout and Hussain Al{-}Asaad and John P. Hayes and Trevor N. Mudge and Richard B. Brown}, title = {High-level design verification of microprocessors via error modeling}, journal = {{ACM} Trans. Design Autom. Electr. Syst.}, volume = {3}, number = {4}, pages = {581--599}, year = {1998}, url = {https://doi.org/10.1145/296333.296347}, doi = {10.1145/296333.296347}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/todaes/CampenhoutAHMB98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccad/CampenhoutMS96, author = {David Van Campenhout and Trevor N. Mudge and Karem A. Sakallah}, editor = {Rob A. Rutenbar and Ralph H. J. M. Otten}, title = {Timing verification of sequential domino circuits}, booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996}, pages = {127--132}, publisher = {{IEEE} Computer Society / {ACM}}, year = {1996}, url = {https://doi.org/10.1109/ICCAD.1996.569418}, doi = {10.1109/ICCAD.1996.569418}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccad/CampenhoutMS96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/spieSR/DaneelsCNEBBF93, author = {Dirk Daneels and David Van Campenhout and Wayne Niblack and William Equitz and Ron Barber and Erwin Bellon and Freddy Fierens}, editor = {Carlton W. Niblack}, title = {Interactive Outlining: An Improved Approach Using Active Contours}, booktitle = {Storage and Retrieval for Image and Video Databases, San Jose, CA, USA, January 31 - February 5, 1993}, series = {{SPIE} Proceedings}, volume = {1908}, pages = {226--233}, publisher = {{SPIE}}, year = {1993}, url = {https://doi.org/10.1117/12.143652}, doi = {10.1117/12.143652}, timestamp = {Thu, 25 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/spieSR/DaneelsCNEBBF93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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