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ORCIDBibTeX records: Elisardo Antelo
@inproceedings{DBLP:conf/arith/VazquezA19,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
editor = {Naofumi Takagi and
Sylvie Boldo and
Martin Langhammer},
title = {New 3D Projection Transformation for Point Clouds},
booktitle = {26th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2019, Kyoto,
Japan, June 10-12, 2019},
pages = {77--83},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ARITH.2019.00020},
doi = {10.1109/ARITH.2019.00020},
timestamp = {Tue, 22 Oct 2019 15:32:50 +0200},
biburl = {https://dblp.org/rec/conf/arith/VazquezA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1902-06655,
author = {Elisardo Antelo},
title = {{ENBB} Processor: Towards the ExaScale Numerical Brain Box [Position
Paper]},
journal = {CoRR},
volume = {abs/1902.06655},
year = {2019},
url = {http://arxiv.org/abs/1902.06655},
eprinttype = {arXiv},
eprint = {1902.06655},
timestamp = {Tue, 21 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1902-06655.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/AnteloMN17,
author = {Elisardo Antelo and
Paolo Montuschi and
Alberto Nannarelli},
title = {Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product
Array Height Reduction},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {64-I},
number = {2},
pages = {409--418},
year = {2017},
url = {https://doi.org/10.1109/TCSI.2016.2561518},
doi = {10.1109/TCSI.2016.2561518},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/AnteloMN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/VazquezA17,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
editor = {Neil Burgess and
Javier D. Bruguera and
Florent de Dinechin},
title = {A Number System Approach for Adder Topologies},
booktitle = {24th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2017, London,
United Kingdom, July 24-26, 2017},
pages = {50--57},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ARITH.2017.33},
doi = {10.1109/ARITH.2017.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/VazquezA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/VazquezA17a,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
editor = {Neil Burgess and
Javier D. Bruguera and
Florent de Dinechin},
title = {A Sum Error Detection Scheme for Decimal Arithmetic},
booktitle = {24th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2017, London,
United Kingdom, July 24-26, 2017},
pages = {172--179},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ARITH.2017.34},
doi = {10.1109/ARITH.2017.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/VazquezA17a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cj/OrosaBA16,
author = {Lois Orosa and
Javier D. Bruguera and
Elisardo Antelo},
title = {Asymmetric Allocation in a Shared Flexible Signature Module for Multicore
Processors},
journal = {Comput. J.},
volume = {59},
number = {10},
pages = {1453--1469},
year = {2016},
url = {https://doi.org/10.1093/comjnl/bxw010},
doi = {10.1093/COMJNL/BXW010},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cj/OrosaBA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VazquezAB14,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo and
Javier D. Bruguera},
title = {Fast Radix-10 Multiplication Using Redundant {BCD} Codes},
journal = {{IEEE} Trans. Computers},
volume = {63},
number = {8},
pages = {1902--1914},
year = {2014},
url = {https://doi.org/10.1109/TC.2014.2315626},
doi = {10.1109/TC.2014.2315626},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VazquezAB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/OrosaAB12,
author = {Lois Orosa and
Elisardo Antelo and
Javier D. Bruguera},
title = {FlexSig: Implementing flexible hardware signatures},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {30:1--30:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086709},
doi = {10.1145/2086696.2086709},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/OrosaAB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloHI12,
author = {Elisardo Antelo and
David Hough and
Paolo Ienne},
title = {Guest Editors' Introduction: Special Section on Computer Arithmetic},
journal = {{IEEE} Trans. Computers},
volume = {61},
number = {8},
pages = {1057--1058},
year = {2012},
url = {https://doi.org/10.1109/TC.2012.153},
doi = {10.1109/TC.2012.153},
timestamp = {Thu, 31 Mar 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloHI12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VazquezVAZ12,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Julio Villalba{-}Moreno and
Elisardo Antelo and
Emilio L. Zapata},
title = {Redundant Floating-Point Decimal {CORDIC} Algorithm},
journal = {{IEEE} Trans. Computers},
volume = {61},
number = {11},
pages = {1551--1562},
year = {2012},
url = {https://doi.org/10.1109/TC.2011.217},
doi = {10.1109/TC.2011.217},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VazquezVAZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LambertiAAM11,
author = {Fabrizio Lamberti and
Nikolaos Andrikos and
Elisardo Antelo and
Paolo Montuschi},
title = {Reducing the Computation Time in (Short Bit-Width) Two's Complement
Multipliers},
journal = {{IEEE} Trans. Computers},
volume = {60},
number = {2},
pages = {148--156},
year = {2011},
url = {https://doi.org/10.1109/TC.2010.156},
doi = {10.1109/TC.2010.156},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LambertiAAM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/arith/2010,
editor = {Elisardo Antelo and
David Hough and
Paolo Ienne},
title = {20th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2011, T{\"{u}}bingen,
Germany, 25-27 July 2011},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/5991607/proceeding},
isbn = {978-0-7695-4318-5},
timestamp = {Thu, 31 Mar 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arith/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VazquezAM10,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo and
Paolo Montuschi},
title = {Improved Design of High-Performance Parallel Decimal Multipliers},
journal = {{IEEE} Trans. Computers},
volume = {59},
number = {5},
pages = {679--693},
year = {2010},
url = {https://doi.org/10.1109/TC.2009.167},
doi = {10.1109/TC.2009.167},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VazquezAM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Antelo09,
author = {Elisardo Antelo},
title = {A Comment on "Beyond Fat-tree: Unidirectional Load-Balanced Multistage
Interconnection Network"},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {8},
number = {1},
pages = {33--34},
year = {2009},
url = {https://doi.org/10.1109/L-CA.2009.6},
doi = {10.1109/L-CA.2009.6},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/Antelo09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/VazquezA09,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
editor = {Javier D. Bruguera and
Marius Cornea and
Debjit Das Sarma and
John Harrison},
title = {A High-Performance Significand {BCD} Adder with {IEEE} 754-2008 Decimal
Rounding},
booktitle = {19th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2009, Portland,
Oregon, USA, 9-10 June 2009},
pages = {135--144},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ARITH.2009.30},
doi = {10.1109/ARITH.2009.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/VazquezA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/VazquezVA09,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Julio Villalba and
Elisardo Antelo},
editor = {Javier D. Bruguera and
Marius Cornea and
Debjit Das Sarma and
John Harrison},
title = {Computation of Decimal Transcendental Functions Using the {CORDIC}
Algorithm},
booktitle = {19th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2009, Portland,
Oregon, USA, 9-10 June 2009},
pages = {179--186},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ARITH.2009.29},
doi = {10.1109/ARITH.2009.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/VazquezVA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloVZ08,
author = {Elisardo Antelo and
Julio Villalba and
Emilio L. Zapata},
title = {A Low-Latency Pipelined 2D and 3D {CORDIC} Processors},
journal = {{IEEE} Trans. Computers},
volume = {57},
number = {3},
pages = {404--417},
year = {2008},
url = {https://doi.org/10.1109/TC.2007.70796},
doi = {10.1109/TC.2007.70796},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloVZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VazquezA08,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
title = {New insights on Ling adders},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {227--232},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580183},
doi = {10.1109/ASAP.2008.4580183},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VazquezA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/VazquezAM07,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo and
Paolo Montuschi},
title = {A New Family of High.Performance Parallel Decimal Multipliers},
booktitle = {18th {IEEE} Symposium on Computer Arithmetic {(ARITH-18} 2007), 25-27
June 2007, Montpellier, France},
pages = {195--204},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ARITH.2007.6},
doi = {10.1109/ARITH.2007.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/VazquezAM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/VazquezAM07,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo and
Paolo Montuschi},
title = {A radix-10 {SRT} divider based on alternative {BCD} codings},
booktitle = {25th International Conference on Computer Design, {ICCD} 2007, 7-10
October 2007, Lake Tahoe, CA, USA, Proceedings},
pages = {280--287},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICCD.2007.4601914},
doi = {10.1109/ICCD.2007.4601914},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/VazquezAM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LangA05,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics},
journal = {{IEEE} Trans. Computers},
volume = {54},
number = {3},
pages = {347--361},
year = {2005},
url = {https://doi.org/10.1109/TC.2005.53},
doi = {10.1109/TC.2005.53},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LangA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloLMN05,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Paolo Montuschi and
Alberto Nannarelli},
title = {Digit-Recurrence Dividers with Reduced Logical Depth},
journal = {{IEEE} Trans. Computers},
volume = {54},
number = {7},
pages = {837--851},
year = {2005},
url = {https://doi.org/10.1109/TC.2005.115},
doi = {10.1109/TC.2005.115},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloLMN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/AnteloLMN05,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Paolo Montuschi and
Alberto Nannarelli},
title = {Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal
Algorithm and Architecture},
booktitle = {17th {IEEE} Symposium on Computer Arithmetic {(ARITH-17} 2005), 27-29
June 2005, Cape Cod, MA, {USA}},
pages = {147--154},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ARITH.2005.29},
doi = {10.1109/ARITH.2005.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/AnteloLMN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/AnteloV05,
author = {Elisardo Antelo and
Julio Villalba},
title = {Low Latency Pipelined Circular {CORDIC}},
booktitle = {17th {IEEE} Symposium on Computer Arithmetic {(ARITH-17} 2005), 27-29
June 2005, Cape Cod, MA, {USA}},
pages = {280--287},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ARITH.2005.30},
doi = {10.1109/ARITH.2005.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/AnteloV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LangA03,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {Radix-4 Reciprocal Square-Root and Its Combination with Division and
Square Root},
journal = {{IEEE} Trans. Computers},
volume = {52},
number = {9},
pages = {1100--1114},
year = {2003},
url = {https://doi.org/10.1109/TC.2003.1228508},
doi = {10.1109/TC.2003.1228508},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LangA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/VazquezA03,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
title = {Implementation of the Exponential Function in a Floating-Point Unit},
journal = {J. {VLSI} Signal Process.},
volume = {33},
number = {1-2},
pages = {125--145},
year = {2003},
url = {https://doi.org/10.1023/A:1021102104078},
doi = {10.1023/A:1021102104078},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/VazquezA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AnteloLMN02,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Paolo Montuschi and
Alberto Nannarelli},
title = {Fast Radix-4 Retimed Division with Selection by Comparisons},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {185--196},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030718},
doi = {10.1109/ASAP.2002.1030718},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AnteloLMN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/LangA01,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4
Implementation},
booktitle = {15th {IEEE} Symposium on Computer Arithmetic (Arith-15 2001), 11-17
June 2001, Vail, CO, {USA}},
pages = {83--93},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ARITH.2001.930107},
doi = {10.1109/ARITH.2001.930107},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/LangA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloLB00,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Javier D. Bruguera},
title = {Very-High Radix Circular {CORDIC:} Vectoring and Unified Rotation/Vectoring},
journal = {{IEEE} Trans. Computers},
volume = {49},
number = {7},
pages = {727--739},
year = {2000},
url = {https://doi.org/10.1109/12.863043},
doi = {10.1109/12.863043},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloLB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/LangA00,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {CORDIC-Based Computation of ArcCos},
journal = {J. {VLSI} Signal Process.},
volume = {25},
number = {1},
pages = {19--38},
year = {2000},
url = {https://doi.org/10.1023/A:1008121502359},
doi = {10.1023/A:1008121502359},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/LangA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/AnteloLB00,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Javier D. Bruguera},
title = {Very-High Radix {CORDIC} Rotation Based on Selection by Rounding},
journal = {J. {VLSI} Signal Process.},
volume = {25},
number = {2},
pages = {141--153},
year = {2000},
url = {https://doi.org/10.1023/A:1008119006403},
doi = {10.1023/A:1008119006403},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/AnteloLB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/AnteloLB99,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Javier D. Bruguera},
title = {Very-High Radix {CORDIC} Vectoring with Scalings and Selection by
Rounding},
booktitle = {14th {IEEE} Symposium on Computer Arithmetic (Arith-14 '99), 14-16
April 1999, Adelaide, Australia},
pages = {204},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ARITH.1999.762846},
doi = {10.1109/ARITH.1999.762846},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/AnteloLB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloLB98,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Javier D. Bruguera},
title = {Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root
Unit with Scaling},
journal = {{IEEE} Trans. Computers},
volume = {47},
number = {2},
pages = {152--161},
year = {1998},
url = {https://doi.org/10.1109/12.663761},
doi = {10.1109/12.663761},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloLB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LangA98,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {{CORDIC} Vectoring with Arbitrary Target Value},
journal = {{IEEE} Trans. Computers},
volume = {47},
number = {7},
pages = {736--749},
year = {1998},
url = {https://doi.org/10.1109/12.709373},
doi = {10.1109/12.709373},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LangA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/AnteloBBZ98,
author = {Elisardo Antelo and
Montserrat B{\'{o}}o and
Javier D. Bruguera and
Emilio L. Zapata},
title = {A novel design of a two operand normalization circuit},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {6},
number = {1},
pages = {173--176},
year = {1998},
url = {https://doi.org/10.1109/92.661260},
doi = {10.1109/92.661260},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/AnteloBBZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/VillalbaZAB98,
author = {Julio Villalba and
Emilio L. Zapata and
Elisardo Antelo and
Javier D. Bruguera},
title = {Radix-4 Vectoring {CORDIC} Algorithm and Architectures},
journal = {J. {VLSI} Signal Process.},
volume = {19},
number = {2},
pages = {127--147},
year = {1998},
url = {https://doi.org/10.1023/A:1008061701575},
doi = {10.1023/A:1008061701575},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/VillalbaZAB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloVBZ97,
author = {Elisardo Antelo and
Julio Villalba and
Javier D. Bruguera and
Emilio L. Zapata},
title = {High Performance Rotation Architectures Based on the Radix-4 {CORDIC}
Algorithm},
journal = {{IEEE} Trans. Computers},
volume = {46},
number = {8},
pages = {855--870},
year = {1997},
url = {https://doi.org/10.1109/12.609275},
doi = {10.1109/12.609275},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloVBZ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloBLZ97,
author = {Elisardo Antelo and
Javier D. Bruguera and
Tom{\'{a}}s Lang and
Emilio L. Zapata},
title = {Error Analysis and Reduction for Angle Calculation Using the {CORDIC}
Algorithm},
journal = {{IEEE} Trans. Computers},
volume = {46},
number = {11},
pages = {1264--1271},
year = {1997},
url = {https://doi.org/10.1109/12.644300},
doi = {10.1109/12.644300},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloBLZ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/LangA97,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {{CORDIC} Vectoring with Arbitrary Target Value},
booktitle = {13th Symposium on Computer Arithmetic {(ARITH-13} '97), 6-9 July 1997,
Asilomar, CA, {USA}},
pages = {108--115},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ARITH.1997.614885},
doi = {10.1109/ARITH.1997.614885},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/LangA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LangA97,
author = {Tom{\'{a}}s Lang and
Elisardo Antelo},
title = {CORDIC-based computation of arccos and arcsin},
booktitle = {1997 International Conference on Application-Specific Systems, Architectures,
and Processors {(ASAP} '97), 14-16 July 1997, Zurich, Switzerland},
pages = {132--143},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ASAP.1997.606820},
doi = {10.1109/ASAP.1997.606820},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LangA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AnteloBZ96,
author = {Elisardo Antelo and
Javier D. Bruguera and
Emilio L. Zapata},
title = {Unified Mixed Radix 2-4 Redundant {CORDIC} Processor},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {9},
pages = {1068--1073},
year = {1996},
url = {https://doi.org/10.1109/12.537131},
doi = {10.1109/12.537131},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AnteloBZ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VillalbaAZAB96,
author = {Julio Villalba and
J. C. Arrabal and
Emilio L. Zapata and
Elisardo Antelo and
Javier D. Bruguera},
title = {Radix-4 Vectoring Cordic Algorithm And Architectures},
booktitle = {1996 International Conference on Application-Specific Systems, Architectures,
and Processors {(ASAP} '96), August 19-23, 1996, Chicago, {IL} , {USA}},
pages = {55--64},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ASAP.1996.542801},
doi = {10.1109/ASAP.1996.542801},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VillalbaAZAB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/AnteloBLVZ96,
author = {Elisardo Antelo and
Javier D. Bruguera and
Tom{\'{a}}s Lang and
Julio Villalba and
Emilio L. Zapata},
editor = {Luc Boug{\'{e}} and
Pierre Fraigniaud and
Anne Mignotte and
Yves Robert},
title = {High Radix Cordic Rotation Based on Selection by Rounding},
booktitle = {Euro-Par '96 Parallel Processing, Second International Euro-Par Conference,
Lyon, France, August 26-29, 1996, Proceedings, Volume {II}},
series = {Lecture Notes in Computer Science},
volume = {1124},
pages = {155--164},
publisher = {Springer},
year = {1996},
url = {https://doi.org/10.1007/BFb0024698},
doi = {10.1007/BFB0024698},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/AnteloBLVZ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/AnteloBVZ95,
author = {Elisardo Antelo and
Javier D. Bruguera and
Julio Villalba and
Emilio L. Zapata},
title = {Redundant {CORDIC} Rotator Based on Parallel Prediction},
booktitle = {12th Symposium on Computer Arithmetic {(ARITH-12} '95), July 19-21,
1995, Bath, England, {UK}},
pages = {172--179},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ARITH.1995.465362},
doi = {10.1109/ARITH.1995.465362},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/AnteloBVZ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OsorioABVZ95,
author = {Roberto R. Osorio and
Elisardo Antelo and
Javier D. Bruguera and
Julio Villalba and
Emilio L. Zapata},
title = {Digit On-line Large Radix {CORDIC} Rotator},
booktitle = {The International Conference on Application Specific Array Processors
(ASAP'95), July 24-26, 1995, Strasbourg, France},
pages = {246--257},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ASAP.1995.522929},
doi = {10.1109/ASAP.1995.522929},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OsorioABVZ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VillalbaHZAB95,
author = {Julio Villalba and
Jos{\'{e}} Antonio Hidalgo L{\'{o}}pez and
Emilio L. Zapata and
Elisardo Antelo and
Javier D. Bruguera},
title = {{CORDIC} Architectures with Parallel Compensation of the Scale Factor},
booktitle = {The International Conference on Application Specific Array Processors
(ASAP'95), July 24-26, 1995, Strasbourg, France},
pages = {258--269},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ASAP.1995.522930},
doi = {10.1109/ASAP.1995.522930},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VillalbaHZAB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/BrugueraAZ93,
author = {Javier D. Bruguera and
Elisardo Antelo and
Emilio L. Zapata},
title = {Design of a Pipelined Radix 4 {CORDIC} Processor},
journal = {Parallel Comput.},
volume = {19},
number = {7},
pages = {729--744},
year = {1993},
url = {https://doi.org/10.1016/0167-8191(93)90061-O},
doi = {10.1016/0167-8191(93)90061-O},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pc/BrugueraAZ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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