BibTeX records: Zaid Al-Wardi

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@inproceedings{DBLP:conf/ismvl/Al-WardiWD18,
  author       = {Zaid Al{-}Wardi and
                  Robert Wille and
                  Rolf Drechsler},
  title        = {Synthesis of Reversible Circuits Using Conventional Hardware Description
                  Languages},
  booktitle    = {48th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
                  2018, Linz, Austria, May 16-18, 2018},
  pages        = {97--102},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISMVL.2018.00025},
  doi          = {10.1109/ISMVL.2018.00025},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ismvl/Al-WardiWD18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ismvl/Al-WardiWD17,
  author       = {Zaid Al{-}Wardi and
                  Robert Wille and
                  Rolf Drechsler},
  title        = {Extensions to the Reversible Hardware Description Language SyReC},
  booktitle    = {47th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
                  2017, Novi Sad, Serbia, May 22-24, 2017},
  pages        = {185--190},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISMVL.2017.41},
  doi          = {10.1109/ISMVL.2017.41},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ismvl/Al-WardiWD17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/rc/Al-WardiWD17,
  author       = {Zaid Al{-}Wardi and
                  Robert Wille and
                  Rolf Drechsler},
  editor       = {Iain Phillips and
                  Hafizur Rahaman},
  title        = {Towards VHDL-Based Design of Reversible Circuits - Work in Progress
                  Report},
  booktitle    = {Reversible Computation - 9th International Conference, {RC} 2017,
                  Kolkata, India, July 6-7, 2017, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {10301},
  pages        = {102--108},
  publisher    = {Springer},
  year         = {2017},
  url          = {https://doi.org/10.1007/978-3-319-59936-6\_8},
  doi          = {10.1007/978-3-319-59936-6\_8},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rc/Al-WardiWD17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ismvl/Al-WardiWD16,
  author       = {Zaid Al{-}Wardi and
                  Robert Wille and
                  Rolf Drechsler},
  title        = {Re-Writing {HDL} Descriptions for Line-Aware Synthesis of Reversible
                  Circuits},
  booktitle    = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
                  2016, Sapporo, Japan, May 18-20, 2016},
  pages        = {31--36},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISMVL.2016.36},
  doi          = {10.1109/ISMVL.2016.36},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ismvl/Al-WardiWD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/rc/Al-WardiWD15,
  author       = {Zaid Al{-}Wardi and
                  Robert Wille and
                  Rolf Drechsler},
  editor       = {Jean Krivine and
                  Jean{-}Bernard Stefani},
  title        = {Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis
                  of Reversible Circuits},
  booktitle    = {Reversible Computation - 7th International Conference, {RC} 2015,
                  Grenoble, France, July 16-17, 2015, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {9138},
  pages        = {233--247},
  publisher    = {Springer},
  year         = {2015},
  url          = {https://doi.org/10.1007/978-3-319-20860-2\_15},
  doi          = {10.1007/978-3-319-20860-2\_15},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rc/Al-WardiWD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}