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ORCIDBibTeX records: Tor M. Aamodt
@inproceedings{DBLP:conf/iclr/ShahA23,
author = {Deval Shah and
Tor M. Aamodt},
title = {Learning Label Encodings for Deep Regression},
booktitle = {The Eleventh International Conference on Learning Representations,
{ICLR} 2023, Kigali, Rwanda, May 1-5, 2023},
publisher = {OpenReview.net},
year = {2023},
url = {https://openreview.net/pdf?id=k60XE\_b0Ix6},
timestamp = {Fri, 30 Jun 2023 14:38:38 +0200},
biburl = {https://dblp.org/rec/conf/iclr/ShahA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/LiuSCGNA23,
author = {Lufei Liu and
Mohammadreza Saed and
Yuan{-}Hsi Chou and
Davit Grigoryan and
Tyler Nowicki and
Tor M. Aamodt},
title = {LumiBench: {A} Benchmark Suite for Hardware Ray Tracing},
booktitle = {{IEEE} International Symposium on Workload Characterization, {IISWC}
2023, Ghent, Belgium, October 1-3, 2023},
pages = {1--14},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/IISWC59245.2023.00011},
doi = {10.1109/IISWC59245.2023.00011},
timestamp = {Sat, 11 Nov 2023 13:55:39 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/LiuSCGNA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ShahYA23,
author = {Deval Shah and
Ningfeng Yang and
Tor M. Aamodt},
editor = {Yan Solihin and
Mark A. Heinrich},
title = {Energy-Efficient Realtime Motion Planning},
booktitle = {Proceedings of the 50th Annual International Symposium on Computer
Architecture, {ISCA} 2023, Orlando, FL, USA, June 17-21, 2023},
pages = {57:1--57:17},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579371.3589092},
doi = {10.1145/3579371.3589092},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/ShahYA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ChouNA23,
author = {Yuan{-}Hsi Chou and
Tyler Nowicki and
Tor M. Aamodt},
title = {Treelet Prefetching For Ray Tracing},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {742--755},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3614288},
doi = {10.1145/3613424.3614288},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/ChouNA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2023-2,
editor = {Tor M. Aamodt and
Natalie D. Enright Jerger and
Michael M. Swift},
title = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 2,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3575693},
doi = {10.1145/3575693},
isbn = {978-1-4503-9916-6},
timestamp = {Thu, 02 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/2023-2.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2023-3,
editor = {Tor M. Aamodt and
Natalie D. Enright Jerger and
Michael M. Swift},
title = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 3,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3582016},
doi = {10.1145/3582016},
isbn = {978-1-4503-9918-0},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/2023-3.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2023-4,
editor = {Tor M. Aamodt and
Michael M. Swift and
Natalie D. Enright Jerger},
title = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 4,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3623278},
doi = {10.1145/3623278},
timestamp = {Thu, 08 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/2023-4.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2303-02273,
author = {Deval Shah and
Tor M. Aamodt},
title = {Learning Label Encodings for Deep Regression},
journal = {CoRR},
volume = {abs/2303.02273},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2303.02273},
doi = {10.48550/ARXIV.2303.02273},
eprinttype = {arXiv},
eprint = {2303.02273},
timestamp = {Tue, 14 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2303-02273.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iclr/ShahXA22,
author = {Deval Shah and
Zi Yu Xue and
Tor M. Aamodt},
title = {Label Encoding for Regression Networks},
booktitle = {The Tenth International Conference on Learning Representations, {ICLR}
2022, Virtual Event, April 25-29, 2022},
publisher = {OpenReview.net},
year = {2022},
url = {https://openreview.net/forum?id=8WawVDdKqlL},
timestamp = {Sat, 20 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iclr/ShahXA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LewLGGEA22,
author = {Jonathan S. Lew and
Yunpeng Liu and
Wenyi Gong and
Negar Goli and
R. David Evans and
Tor M. Aamodt},
editor = {Valentina Salapura and
Mohamed Zahran and
Fred Chong and
Lingjia Tang},
title = {Anticipating and eliminating redundant computations in accelerated
sparse training},
booktitle = {{ISCA} '22: The 49th Annual International Symposium on Computer Architecture,
New York, New York, USA, June 18 - 22, 2022},
pages = {536--551},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3470496.3527404},
doi = {10.1145/3470496.3527404},
timestamp = {Tue, 25 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/LewLGGEA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SaedCLNA22,
author = {Mohammadreza Saed and
Yuan{-}Hsi Chou and
Lufei Liu and
Tyler Nowicki and
Tor M. Aamodt},
title = {Vulkan-Sim: {A} {GPU} Architecture Simulator for Ray Tracing},
booktitle = {55th {IEEE/ACM} International Symposium on Microarchitecture, {MICRO}
2022, Chicago, IL, USA, October 1-5, 2022},
pages = {263--281},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/MICRO56248.2022.00027},
doi = {10.1109/MICRO56248.2022.00027},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/SaedCLNA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2023-1,
editor = {Tor M. Aamodt and
Natalie D. Enright Jerger and
Michael M. Swift},
title = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 1,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3567955},
doi = {10.1145/3567955},
isbn = {978-1-4503-9915-9},
timestamp = {Thu, 22 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/2023-1.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2212-01927,
author = {Deval Shah and
Zi Yu Xue and
Tor M. Aamodt},
title = {Label Encoding for Regression Networks},
journal = {CoRR},
volume = {abs/2212.01927},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2212.01927},
doi = {10.48550/ARXIV.2212.01927},
eprinttype = {arXiv},
eprint = {2212.01927},
timestamp = {Thu, 08 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2212-01927.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LiuCDCSPNA21,
author = {Lufei Liu and
Wesley Chang and
Francois Demoullin and
Yuan{-}Hsi Chou and
Mohammadreza Saed and
David Pankratz and
Tyler Nowicki and
Tor M. Aamodt},
title = {Intersection Prediction for Accelerated {GPU} Ray Tracing},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {709--723},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480097},
doi = {10.1145/3466752.3480097},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LiuCDCSPNA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KandiahPKPMRAH21,
author = {Vijay Kandiah and
Scott Peverelle and
Mahmoud Khairy and
Junrui Pan and
Amogh Manjunath and
Timothy G. Rogers and
Tor M. Aamodt and
Nikos Hardavellas},
title = {AccelWattch: {A} Power Modeling Framework for Modern GPUs},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {738--753},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480063},
doi = {10.1145/3466752.3480063},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KandiahPKPMRAH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nips/EvansA21,
author = {R. David Evans and
Tor M. Aamodt},
editor = {Marc'Aurelio Ranzato and
Alina Beygelzimer and
Yann N. Dauphin and
Percy Liang and
Jennifer Wortman Vaughan},
title = {{AC-GC:} Lossy Activation Compression with Guaranteed Convergence},
booktitle = {Advances in Neural Information Processing Systems 34: Annual Conference
on Neural Information Processing Systems 2021, NeurIPS 2021, December
6-14, 2021, virtual},
pages = {27434--27448},
year = {2021},
url = {https://proceedings.neurips.cc/paper/2021/hash/e655c7716a4b3ea67f48c6322fc42ed6-Abstract.html},
timestamp = {Tue, 03 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nips/EvansA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2110-08906,
author = {Deval Shah and
Zi Yu Xue and
Karthik Pattabiraman and
Tor M. Aamodt},
title = {Characterizing and Improving the Resilience of Accelerators in Autonomous
Robots},
journal = {CoRR},
volume = {abs/2110.08906},
year = {2021},
url = {https://arxiv.org/abs/2110.08906},
eprinttype = {arXiv},
eprint = {2110.08906},
timestamp = {Fri, 22 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2110-08906.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MohammadiHABAD20,
author = {Milad Mohammadi and
Song Han and
Ehsan Atoofian and
Amirali Baniasadi and
Tor M. Aamodt and
William J. Dally},
title = {Energy Efficient On-Demand Dynamic Branch Prediction Models},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {3},
pages = {453--465},
year = {2020},
url = {https://doi.org/10.1109/TC.2019.2956710},
doi = {10.1109/TC.2019.2956710},
timestamp = {Fri, 20 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/MohammadiHABAD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/KimCRBAK20,
author = {Jiho Kim and
Sanghun Cho and
Minsoo Rhu and
Ali Bakhoda and
Tor M. Aamodt and
John Kim},
editor = {Vivek Sarkar and
Hyesoon Kim},
title = {Bandwidth Bottleneck in Network-on-Chip for High-Throughput Processors},
booktitle = {{PACT} '20: International Conference on Parallel Architectures and
Compilation Techniques, Virtual Event, GA, USA, October 3-7, 2020},
pages = {157--158},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3410463.3414673},
doi = {10.1145/3410463.3414673},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/KimCRBAK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cvpr/GoliA20,
author = {Negar Goli and
Tor M. Aamodt},
title = {ReSprop: Reuse Sparsified Backpropagation},
booktitle = {2020 {IEEE/CVF} Conference on Computer Vision and Pattern Recognition,
{CVPR} 2020, Seattle, WA, USA, June 13-19, 2020},
pages = {1545--1555},
publisher = {Computer Vision Foundation / {IEEE}},
year = {2020},
url = {https://openaccess.thecvf.com/content\_CVPR\_2020/html/Goli\_ReSprop\_Reuse\_Sparsified\_Backpropagation\_CVPR\_2020\_paper.html},
doi = {10.1109/CVPR42600.2020.00162},
timestamp = {Tue, 31 Aug 2021 14:00:04 +0200},
biburl = {https://dblp.org/rec/conf/cvpr/GoliA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KhairySAR20,
author = {Mahmoud Khairy and
Zhesheng Shen and
Tor M. Aamodt and
Timothy G. Rogers},
title = {Accel-Sim: An Extensible Simulation Framework for Validated {GPU}
Modeling},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {473--486},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00047},
doi = {10.1109/ISCA45697.2020.00047},
timestamp = {Mon, 19 Feb 2024 07:32:24 +0100},
biburl = {https://dblp.org/rec/conf/isca/KhairySAR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/EvansLA20,
author = {R. David Evans and
Lufei Liu and
Tor M. Aamodt},
title = {{JPEG-ACT:} Accelerating Deep Learning via Transform-based Lossy Compression},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {860--873},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00075},
doi = {10.1109/ISCA45697.2020.00075},
timestamp = {Wed, 22 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/EvansLA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ChouNCISDRA20,
author = {Yuan{-}Hsi Chou and
Christopher Ng and
Shaylin Cattell and
Jeremy Intan and
Matthew D. Sinclair and
Joseph Devietti and
Timothy G. Rogers and
Tor M. Aamodt},
title = {Deterministic Atomic Buffering},
booktitle = {53rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2020, Athens, Greece, October 17-21, 2020},
pages = {981--995},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MICRO50266.2020.00083},
doi = {10.1109/MICRO50266.2020.00083},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/ChouNCISDRA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nips/RaihanA20,
author = {Md Aamir Raihan and
Tor M. Aamodt},
editor = {Hugo Larochelle and
Marc'Aurelio Ranzato and
Raia Hadsell and
Maria{-}Florina Balcan and
Hsuan{-}Tien Lin},
title = {Sparse Weight Activation Training},
booktitle = {Advances in Neural Information Processing Systems 33: Annual Conference
on Neural Information Processing Systems 2020, NeurIPS 2020, December
6-12, 2020, virtual},
year = {2020},
url = {https://proceedings.neurips.cc/paper/2020/hash/b44182379bf9fae976e6ae5996e13cd8-Abstract.html},
timestamp = {Tue, 19 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nips/RaihanA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2001-01969,
author = {Md Aamir Raihan and
Tor M. Aamodt},
title = {Sparse Weight Activation Training},
journal = {CoRR},
volume = {abs/2001.01969},
year = {2020},
url = {http://arxiv.org/abs/2001.01969},
eprinttype = {arXiv},
eprint = {2001.01969},
timestamp = {Mon, 13 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2001-01969.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/HetheringtonLSA19,
author = {Tayler Hicklin Hetherington and
Maria Lubeznov and
Deval Shah and
Tor M. Aamodt},
title = {{EDGE:} Event-Driven {GPU} Execution},
booktitle = {28th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2019, Seattle, WA, USA, September 23-26, 2019},
pages = {337--353},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/PACT.2019.00034},
doi = {10.1109/PACT.2019.00034},
timestamp = {Wed, 13 Nov 2019 18:02:12 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/HetheringtonLSA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GubranA19,
author = {Ayub A. Gubran and
Tor M. Aamodt},
editor = {Srilatha Bobbie Manne and
Hillery C. Hunter and
Erik R. Altman},
title = {Emerald: graphics modeling for SoC systems},
booktitle = {Proceedings of the 46th International Symposium on Computer Architecture,
{ISCA} 2019, Phoenix, AZ, USA, June 22-26, 2019},
pages = {169--182},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3307650.3322221},
doi = {10.1145/3307650.3322221},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/GubranA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/RaihanGA19,
author = {Md Aamir Raihan and
Negar Goli and
Tor M. Aamodt},
title = {Modeling Deep Learning Accelerator Enabled GPUs},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2019, Madison, WI, USA, March 24-26, 2019},
pages = {79--92},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISPASS.2019.00016},
doi = {10.1109/ISPASS.2019.00016},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/ispass/RaihanGA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/KhairyJAR19,
author = {Mahmoud Khairy and
Akshay Jain and
Tor M. Aamodt and
Timothy G. Rogers},
title = {A Detailed Model for Contemporary {GPU} Memory Systems},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2019, Madison, WI, USA, March 24-26, 2019},
pages = {141--142},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISPASS.2019.00023},
doi = {10.1109/ISPASS.2019.00023},
timestamp = {Sat, 04 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/KhairyJAR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/LewSPCZSNGSRA19,
author = {Jonathan S. Lew and
Deval A. Shah and
Suchita Pati and
Shaylin Cattell and
Mengchi Zhang and
Amruth Sandhupatla and
Christopher Ng and
Negar Goli and
Matthew D. Sinclair and
Timothy G. Rogers and
Tor M. Aamodt},
title = {Analyzing Machine Learning Workloads Using a Detailed {GPU} Simulator},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2019, Madison, WI, USA, March 24-26, 2019},
pages = {151--152},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISPASS.2019.00028},
doi = {10.1109/ISPASS.2019.00028},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/LewSPCZSNGSRA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1903-06658,
author = {Ayub A. Gubran and
Felix Huang and
Tor M. Aamodt},
title = {Surface Compression Using Dynamic Color Palettes},
journal = {CoRR},
volume = {abs/1903.06658},
year = {2019},
url = {http://arxiv.org/abs/1903.06658},
eprinttype = {arXiv},
eprint = {1903.06658},
timestamp = {Mon, 01 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1903-06658.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1910-01304,
author = {Francois Demoullin and
Ayub A. Gubran and
Tor M. Aamodt},
title = {Hash-Based Ray Path Prediction: Skipping {BVH} Traversal Computation
by Exploiting Ray Locality},
journal = {CoRR},
volume = {abs/1910.01304},
year = {2019},
url = {http://arxiv.org/abs/1910.01304},
eprinttype = {arXiv},
eprint = {1910.01304},
timestamp = {Fri, 04 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1910-01304.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/synthesis/2018Aamodt,
author = {Tor M. Aamodt and
Wilson Wai Lun Fung and
Timothy G. Rogers},
title = {General-Purpose Graphics Processor Architectures},
series = {Synthesis Lectures on Computer Architecture},
publisher = {Morgan {\&} Claypool Publishers},
year = {2018},
url = {https://doi.org/10.2200/S00848ED1V01Y201804CAC044},
doi = {10.2200/S00848ED1V01Y201804CAC044},
isbn = {978-3-031-00631-9},
timestamp = {Sat, 28 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/synthesis/2018Aamodt.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/MoshovosAJLSPHA18,
author = {Andreas Moshovos and
Jorge Albericio and
Patrick Judd and
Alberto Delmas Lascorz and
Sayeh Sharify and
Zissis Poulos and
Tayler H. Hetherington and
Tor M. Aamodt and
Natalie D. Enright Jerger},
title = {Exploiting Typical Values to Accelerate Deep Learning},
journal = {Computer},
volume = {51},
number = {5},
pages = {18--30},
year = {2018},
url = {https://doi.org/10.1109/MC.2018.2381114},
doi = {10.1109/MC.2018.2381114},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/MoshovosAJLSPHA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/MoshovosAJLSHAJ18,
author = {Andreas Moshovos and
Jorge Albericio and
Patrick Judd and
Alberto Delmas Lascorz and
Sayeh Sharify and
Tayler H. Hetherington and
Tor M. Aamodt and
Natalie D. Enright Jerger},
title = {Value-Based Deep-Learning Acceleration},
journal = {{IEEE} Micro},
volume = {38},
number = {1},
pages = {41--55},
year = {2018},
url = {https://doi.org/10.1109/MM.2018.112130309},
doi = {10.1109/MM.2018.112130309},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/MoshovosAJLSHAJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/JuddAHAJUM18,
author = {Patrick Judd and
Jorge Albericio and
Tayler H. Hetherington and
Tor M. Aamodt and
Natalie D. Enright Jerger and
Raquel Urtasun and
Andreas Moshovos},
title = {Proteus: Exploiting precision variability in deep neural networks},
journal = {Parallel Comput.},
volume = {73},
pages = {40--51},
year = {2018},
url = {https://doi.org/10.1016/j.parco.2017.05.003},
doi = {10.1016/J.PARCO.2017.05.003},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pc/JuddAHAJUM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ElTantawyA18,
author = {Ahmed ElTantawy and
Tor M. Aamodt},
title = {Warp Scheduling for Fine-Grained Synchronization},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2018, Vienna, Austria, February 24-28, 2018},
pages = {375--388},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/HPCA.2018.00040},
doi = {10.1109/HPCA.2018.00040},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ElTantawyA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/MoshovosAJDSMHN18,
author = {Andreas Moshovos and
Jorge Albericio and
Patrick Judd and
Alberto Delmas and
Sayeh Sharify and
Mostafa Mahmoud and
Tayler H. Hetherington and
Milos Nikolic and
Dylan Malone Stuart and
Kevin Siu and
Zissis Poulos and
Tor M. Aamodt and
Natalie D. Enright Jerger},
title = {Identifying and Exploiting Ineffectual Computations to Enable Hardware
Acceleration of Deep Learning},
booktitle = {16th {IEEE} International New Circuits and Systems Conference, {NEWCAS}
2018, Montr{\'{e}}al, QC, Canada, June 24-27, 2018},
pages = {356--360},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/NEWCAS.2018.8585656},
doi = {10.1109/NEWCAS.2018.8585656},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/newcas/MoshovosAJDSMHN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1810-07269,
author = {Mahmoud Khairy and
Akshay Jain and
Tor M. Aamodt and
Timothy G. Rogers},
title = {Exploring Modern {GPU} Memory System Design Challenges through Accurate
Modeling},
journal = {CoRR},
volume = {abs/1810.07269},
year = {2018},
url = {http://arxiv.org/abs/1810.07269},
eprinttype = {arXiv},
eprint = {1810.07269},
timestamp = {Tue, 30 Oct 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1810-07269.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-08309,
author = {Md Aamir Raihan and
Negar Goli and
Tor M. Aamodt},
title = {Modeling Deep Learning Accelerator Enabled GPUs},
journal = {CoRR},
volume = {abs/1811.08309},
year = {2018},
url = {http://arxiv.org/abs/1811.08309},
eprinttype = {arXiv},
eprint = {1811.08309},
timestamp = {Mon, 26 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-08309.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-08933,
author = {Jonathan S. Lew and
Deval Shah and
Suchita Pati and
Shaylin Cattell and
Mengchi Zhang and
Amruth Sandhupatla and
Christopher Ng and
Negar Goli and
Matthew D. Sinclair and
Timothy G. Rogers and
Tor M. Aamodt},
title = {Analyzing Machine Learning Workloads Using a Detailed {GPU} Simulator},
journal = {CoRR},
volume = {abs/1811.08933},
year = {2018},
url = {http://arxiv.org/abs/1811.08933},
eprinttype = {arXiv},
eprint = {1811.08933},
timestamp = {Wed, 01 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-08933.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/MohammadiAD17,
author = {Milad Mohammadi and
Tor M. Aamodt and
William J. Dally},
title = {CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution Near
In-Order Energy with Near Out-of-Order Performance},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {14},
number = {4},
pages = {39:1--39:26},
year = {2017},
url = {https://doi.org/10.1145/3151034},
doi = {10.1145/3151034},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/MohammadiAD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AssadikhomamiOA17,
author = {Shadi Assadikhomami and
Jennifer Ongko and
Tor M. Aamodt},
title = {A state machine block for high-level synthesis},
booktitle = {International Conference on Field Programmable Technology, {FPT} 2017,
Melbourne, Australia, December 11-13, 2017},
pages = {80--87},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/FPT.2017.8280124},
doi = {10.1109/FPT.2017.8280124},
timestamp = {Mon, 17 Feb 2020 13:32:07 +0100},
biburl = {https://dblp.org/rec/conf/fpt/AssadikhomamiOA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/TurakhiaDAD17,
author = {Yatish Turakhia and
Subhasis Das and
Tor M. Aamodt and
William J. Dally},
title = {HoLiSwap: Reducing Wire Energy in {L1} Caches},
journal = {CoRR},
volume = {abs/1701.03878},
year = {2017},
url = {http://arxiv.org/abs/1701.03878},
eprinttype = {arXiv},
eprint = {1701.03878},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/TurakhiaDAD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiA16,
author = {Dongdong Li and
Tor M. Aamodt},
title = {Inter-Core Locality Aware Memory Scheduling},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {15},
number = {1},
pages = {25--28},
year = {2016},
url = {https://doi.org/10.1109/LCA.2015.2435709},
doi = {10.1109/LCA.2015.2435709},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/LiA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DasAD16,
author = {Subhasis Das and
Tor M. Aamodt and
William J. Dally},
title = {Reuse Distance-Based Probabilistic Cache Replacement},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {12},
number = {4},
pages = {33:1--33:22},
year = {2016},
url = {https://doi.org/10.1145/2818374},
doi = {10.1145/2818374},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DasAD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/JuddAHAJM16,
author = {Patrick Judd and
Jorge Albericio and
Tayler H. Hetherington and
Tor M. Aamodt and
Natalie D. Enright Jerger and
Andreas Moshovos},
editor = {Ozcan Ozturk and
Kemal Ebcioglu and
Mahmut T. Kandemir and
Onur Mutlu},
title = {Proteus: Exploiting Numerical Precision Variability in Deep Neural
Networks},
booktitle = {Proceedings of the 2016 International Conference on Supercomputing,
{ICS} 2016, Istanbul, Turkey, June 1-3, 2016},
pages = {23:1--23:12},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2925426.2926294},
doi = {10.1145/2925426.2926294},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ics/JuddAHAJM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AlbericioJHAJM16,
author = {Jorge Albericio and
Patrick Judd and
Tayler H. Hetherington and
Tor M. Aamodt and
Natalie D. Enright Jerger and
Andreas Moshovos},
title = {Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing},
booktitle = {43rd {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2016, Seoul, South Korea, June 18-22, 2016},
pages = {1--13},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISCA.2016.11},
doi = {10.1109/ISCA.2016.11},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/AlbericioJHAJM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ElTantawyA16,
author = {Ahmed ElTantawy and
Tor M. Aamodt},
title = {{MIMD} synchronization on {SIMT} architectures},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {11:1--11:14},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783714},
doi = {10.1109/MICRO.2016.7783714},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/ElTantawyA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JuddAHAM16,
author = {Patrick Judd and
Jorge Albericio and
Tayler H. Hetherington and
Tor M. Aamodt and
Andreas Moshovos},
title = {Stripes: Bit-serial deep neural network computing},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {19:1--19:12},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783722},
doi = {10.1109/MICRO.2016.7783722},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/JuddAHAM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/MohammadiAD16,
author = {Milad Mohammadi and
Tor M. Aamodt and
William J. Dally},
title = {CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution},
journal = {CoRR},
volume = {abs/1606.01607},
year = {2016},
url = {http://arxiv.org/abs/1606.01607},
eprinttype = {arXiv},
eprint = {1606.01607},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/MohammadiAD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MohammadiHAD15,
author = {Milad Mohammadi and
Song Han and
Tor M. Aamodt and
William J. Dally},
title = {On-Demand Dynamic Branch Prediction},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {14},
number = {1},
pages = {50--53},
year = {2015},
url = {https://doi.org/10.1109/LCA.2014.2330820},
doi = {10.1109/LCA.2014.2330820},
timestamp = {Fri, 20 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MohammadiHAD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cloud/HetheringtonOA15,
author = {Tayler H. Hetherington and
Mike O'Connor and
Tor M. Aamodt},
editor = {Shahram Ghandeharizadeh and
Sumita Barahmand and
Magdalena Balazinska and
Michael J. Freedman},
title = {MemcachedGPU: scaling-up scale-out key-value stores},
booktitle = {Proceedings of the Sixth {ACM} Symposium on Cloud Computing, SoCC
2015, Kohala Coast, Hawaii, USA, August 27-29, 2015},
pages = {43--57},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2806777.2806836},
doi = {10.1145/2806777.2806836},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cloud/HetheringtonOA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DasAD15,
author = {Subhasis Das and
Tor M. Aamodt and
William J. Dally},
editor = {Deborah T. Marr and
David H. Albonesi},
title = {{SLIP:} reducing wire energy in the memory hierarchy},
booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
Architecture, Portland, OR, USA, June 13-17, 2015},
pages = {349--361},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2749469.2750398},
doi = {10.1145/2749469.2750398},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/DasAD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/JuddAHAJUM15,
author = {Patrick Judd and
Jorge Albericio and
Tayler H. Hetherington and
Tor M. Aamodt and
Natalie D. Enright Jerger and
Raquel Urtasun and
Andreas Moshovos},
title = {Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets},
journal = {CoRR},
volume = {abs/1511.05236},
year = {2015},
url = {http://arxiv.org/abs/1511.05236},
eprinttype = {arXiv},
eprint = {1511.05236},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/JuddAHAJUM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/RogersOA14,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
title = {Learning your limit: managing massively multithreaded caches through
scheduling},
journal = {Commun. {ACM}},
volume = {57},
number = {12},
pages = {91--98},
year = {2014},
url = {https://doi.org/10.1145/2682583},
doi = {10.1145/2682583},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cacm/RogersOA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SinghSFOA14,
author = {Inderpreet Singh and
Arrvindh Shriraman and
Wilson W. L. Fung and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache Coherence for {GPU} Architectures},
journal = {{IEEE} Micro},
volume = {34},
number = {3},
pages = {69--79},
year = {2014},
url = {https://doi.org/10.1109/MM.2014.4},
doi = {10.1109/MM.2014.4},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SinghSFOA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ElTantawyMOA14,
author = {Ahmed ElTantawy and
Jessica Wenjie Ma and
Mike O'Connor and
Tor M. Aamodt},
title = {A scalable multi-path microarchitecture for efficient {GPU} control
flow},
booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
pages = {248--259},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HPCA.2014.6835936},
doi = {10.1109/HPCA.2014.6835936},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ElTantawyMOA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/Aamodt14,
author = {Tor M. Aamodt},
title = {Scaling usable computing capability},
booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos,
Greece, July 14-17, 2014},
pages = {i},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SAMOS.2014.6893185},
doi = {10.1109/SAMOS.2014.6893185},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/samos/Aamodt14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/RogersOA13,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache-Conscious Thread Scheduling for Massively Multithreaded Processors},
journal = {{IEEE} Micro},
volume = {33},
number = {3},
pages = {78--85},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.24},
doi = {10.1109/MM.2013.24},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/RogersOA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BakhodaKA13,
author = {Ali Bakhoda and
John Kim and
Tor M. Aamodt},
title = {Designing on-chip networks for throughput accelerators},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {10},
number = {3},
pages = {21:1--21:35},
year = {2013},
url = {https://doi.org/10.1145/2512429},
doi = {10.1145/2512429},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/BakhodaKA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/JooybarFODA13,
author = {Hadi Jooybar and
Wilson W. L. Fung and
Mike O'Connor and
Joseph Devietti and
Tor M. Aamodt},
editor = {Vivek Sarkar and
Rastislav Bod{\'{\i}}k},
title = {GPUDet: a deterministic {GPU} architecture},
booktitle = {Architectural Support for Programming Languages and Operating Systems,
{ASPLOS} 2013, Houston, TX, USA, March 16-20, 2013},
pages = {1--12},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2451116.2451118},
doi = {10.1145/2451116.2451118},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/JooybarFODA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZakharenkoAM13,
author = {Vitaly Zakharenko and
Tor M. Aamodt and
Andreas Moshovos},
editor = {Enrico Macii},
title = {Characterizing the performance benefits of fused {CPU/GPU} systems
using FusionSim},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {685--688},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.148},
doi = {10.7873/DATE.2013.148},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/ZakharenkoAM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SinghSFOA13,
author = {Inderpreet Singh and
Arrvindh Shriraman and
Wilson W. L. Fung and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache coherence for {GPU} architectures},
booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2013, Shenzhen, China, February 23-27, 2013},
pages = {578--590},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HPCA.2013.6522351},
doi = {10.1109/HPCA.2013.6522351},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SinghSFOA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LengHEGKAR13,
author = {Jingwen Leng and
Tayler H. Hetherington and
Ahmed ElTantawy and
Syed Zohaib Gilani and
Nam Sung Kim and
Tor M. Aamodt and
Vijay Janapa Reddi},
editor = {Avi Mendelson},
title = {GPUWattch: enabling energy optimizations in GPGPUs},
booktitle = {The 40th Annual International Symposium on Computer Architecture,
ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
pages = {487--498},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2485922.2485964},
doi = {10.1145/2485922.2485964},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/LengHEGKAR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RogersOA13,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
editor = {Matthew K. Farrens and
Christos Kozyrakis},
title = {Divergence-aware warp scheduling},
booktitle = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
MICRO-46, Davis, CA, USA, December 7-11, 2013},
pages = {99--110},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2540708.2540718},
doi = {10.1145/2540708.2540718},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/RogersOA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FungA13,
author = {Wilson W. L. Fung and
Tor M. Aamodt},
editor = {Matthew K. Farrens and
Christos Kozyrakis},
title = {Energy efficient {GPU} transactional memory via space-time optimizations},
booktitle = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
MICRO-46, Davis, CA, USA, December 7-11, 2013},
pages = {408--420},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2540708.2540743},
doi = {10.1145/2540708.2540743},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/FungA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/FungSBA12,
author = {Wilson Wai Lun Fung and
Inderpreet Singh and
Andrew Brownsword and
Tor M. Aamodt},
title = {Kilo {TM:} Hardware Transactional Memory for {GPU} Architectures},
journal = {{IEEE} Micro},
volume = {32},
number = {3},
pages = {7--16},
year = {2012},
url = {https://doi.org/10.1109/MM.2012.16},
doi = {10.1109/MM.2012.16},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/FungSBA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChenA12,
author = {Xi E. Chen and
Tor M. Aamodt},
title = {Modeling Cache Contention and Throughput of Multiprogrammed Manycore
Processors},
journal = {{IEEE} Trans. Computers},
volume = {61},
number = {7},
pages = {913--927},
year = {2012},
url = {https://doi.org/10.1109/TC.2011.141},
doi = {10.1109/TC.2011.141},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChenA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/GortPKAHWY12,
author = {Marcel Gort and
Flavio M. de Paula and
Johnny J. W. Kuan and
Tor M. Aamodt and
Alan J. Hu and
Steven J. E. Wilton and
Jin Yang},
title = {Formal-Analysis-Based Trace Computation for Post-Silicon Debug},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {11},
pages = {1997--2010},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2166416},
doi = {10.1109/TVLSI.2011.2166416},
timestamp = {Mon, 17 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/GortPKAHWY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/KwaA12,
author = {Jimmy Kwa and
Tor M. Aamodt},
title = {Small virtual channel routers on FPGAs through block {RAM} sharing},
booktitle = {2012 International Conference on Field-Programmable Technology, {FPT}
2012, Seoul, Korea (South), December 10-12, 2012},
pages = {71--79},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPT.2012.6412115},
doi = {10.1109/FPT.2012.6412115},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/KwaA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/HetheringtonRHOA12,
author = {Tayler H. Hetherington and
Timothy G. Rogers and
Lisa Hsu and
Mike O'Connor and
Tor M. Aamodt},
editor = {Rajeev Balasubramonian and
Vijayalakshmi Srinivasan},
title = {Characterizing and evaluating a key-value store application on heterogeneous
{CPU-GPU} systems},
booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
{\&} Software, New Brunswick, NJ, USA, April 1-3, 2012},
pages = {88--98},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISPASS.2012.6189209},
doi = {10.1109/ISPASS.2012.6189209},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/HetheringtonRHOA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RogersOA12,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache-Conscious Wavefront Scheduling},
booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
pages = {72--83},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MICRO.2012.16},
doi = {10.1109/MICRO.2012.16},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/RogersOA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/KuanA12,
author = {Johnny J. W. Kuan and
Tor M. Aamodt},
title = {Progressive-BackSpace: Efficient Predecessor Computation for Post-Silicon
Debug},
booktitle = {13th International Workshop on Microprocessor Test and Verification,
{MTV} 2012, Austin, TX, USA, December 10-13, 2012},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MTV.2012.23},
doi = {10.1109/MTV.2012.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/KuanA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ChenA11,
author = {Xi E. Chen and
Tor M. Aamodt},
title = {Hybrid analytical modeling of pending cache hits, data prefetching,
and MSHRs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {10:1--10:28},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019609},
doi = {10.1145/2019608.2019609},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/ChenA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FungA11,
author = {Wilson W. L. Fung and
Tor M. Aamodt},
title = {Thread block compaction for efficient {SIMT} control flow},
booktitle = {17th International Conference on High-Performance Computer Architecture
{(HPCA-17} 2011), February 12-16 2011, San Antonio, Texas, {USA}},
pages = {25--36},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/HPCA.2011.5749714},
doi = {10.1109/HPCA.2011.5749714},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/FungA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FungSBA11,
author = {Wilson W. L. Fung and
Inderpreet Singh and
Andrew Brownsword and
Tor M. Aamodt},
editor = {Carlo Galuzzi and
Luigi Carro and
Andreas Moshovos and
Milos Prvulovic},
title = {Hardware transactional memory for {GPU} architectures},
booktitle = {44rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2011, Porto Alegre, Brazil, December 3-7, 2011},
pages = {296--307},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2155620.2155655},
doi = {10.1145/2155620.2155655},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/FungSBA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/BakhodaKA10,
author = {Ali Bakhoda and
John Kim and
Tor M. Aamodt},
editor = {Valentina Salapura and
Michael Gschwind and
Jens Knoop},
title = {On-chip network design considerations for compute accelerators},
booktitle = {19th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2010, Vienna, Austria, September 11-15, 2010},
pages = {535--536},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1854273.1854339},
doi = {10.1145/1854273.1854339},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/BakhodaKA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/ArielFTA10,
author = {Aaron Ariel and
Wilson W. L. Fung and
Andrew E. Turner and
Tor M. Aamodt},
title = {Visualizing complex dynamics in many-core accelerator architectures},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2010, 28-30 March 2010, White Plains, NY, {USA}},
pages = {164--174},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISPASS.2010.5452029},
doi = {10.1109/ISPASS.2010.5452029},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/ArielFTA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KuanWA10,
author = {Johnny J. W. Kuan and
Steven J. E. Wilton and
Tor M. Aamodt},
title = {Accelerating trace computation in post-silicon debug},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {244--249},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450450},
doi = {10.1109/ISQED.2010.5450450},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/KuanWA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/BakhodaKA10,
author = {Ali Bakhoda and
John Kim and
Tor M. Aamodt},
title = {Throughput-Effective On-Chip Networks for Manycore Accelerators},
booktitle = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
pages = {421--432},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/MICRO.2010.50},
doi = {10.1109/MICRO.2010.50},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/BakhodaKA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/FungSYA09,
author = {Wilson W. L. Fung and
Ivan Sham and
George L. Yuan and
Tor M. Aamodt},
title = {Dynamic warp formation: Efficient {MIMD} control flow on {SIMD} graphics
hardware},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {6},
number = {2},
pages = {7:1--7:37},
year = {2009},
url = {https://doi.org/10.1145/1543753.1543756},
doi = {10.1145/1543753.1543756},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/FungSYA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChenA09,
author = {Xi E. Chen and
Tor M. Aamodt},
title = {A first-order fine-grained multithreaded throughput model},
booktitle = {15th International Conference on High-Performance Computer Architecture
{(HPCA-15} 2009), 14-18 February 2009, Raleigh, North Carolina, {USA}},
pages = {329--340},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/HPCA.2009.4798270},
doi = {10.1109/HPCA.2009.4798270},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ChenA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/BakhodaYFWA09,
author = {Ali Bakhoda and
George L. Yuan and
Wilson W. L. Fung and
Henry Wong and
Tor M. Aamodt},
title = {Analyzing {CUDA} workloads using a detailed {GPU} simulator},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2009, April 26-28, 2009, Boston, Massachusetts,
USA, Proceedings},
pages = {163--174},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISPASS.2009.4919648},
doi = {10.1109/ISPASS.2009.4919648},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/BakhodaYFWA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/YuanBA09,
author = {George L. Yuan and
Ali Bakhoda and
Tor M. Aamodt},
editor = {David H. Albonesi and
Margaret Martonosi and
David I. August and
Jos{\'{e}} F. Mart{\'{\i}}nez},
title = {Complexity effective memory access scheduling for many-core accelerator
architectures},
booktitle = {42st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-42} 2009), December 12-16, 2009, New York, New York, {USA}},
pages = {34--44},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1669112.1669119},
doi = {10.1145/1669112.1669119},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/YuanBA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AamodtC08,
author = {Tor M. Aamodt and
Paul Chow},
title = {Compile-time and instruction-set methods for improving floating- to
fixed-point conversion accuracy},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {7},
number = {3},
pages = {26:1--26:27},
year = {2008},
url = {https://doi.org/10.1145/1347375.1347379},
doi = {10.1145/1347375.1347379},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AamodtC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WongBSACWCGJW08,
author = {Henry Wong and
Anne Bracy and
Ethan Schuchman and
Tor M. Aamodt and
Jamison D. Collins and
Perry H. Wang and
Gautham N. Chinya and
Ankur Khandelwal Groen and
Hong Jiang and
Hong Wang},
editor = {Andreas Moshovos and
David Tarditi and
Kunle Olukotun},
title = {Pangaea: a tightly-coupled {IA32} heterogeneous chip multiprocessor},
booktitle = {17th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2008, Toronto, Ontario, Canada, October 25-29,
2008},
pages = {52--61},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1454115.1454125},
doi = {10.1145/1454115.1454125},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/WongBSACWCGJW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ChenA08,
author = {Xi E. Chen and
Tor M. Aamodt},
title = {Hybrid analytical modeling of pending cache hits, data prefetching,
and MSHRs},
booktitle = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy},
pages = {59--70},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/MICRO.2008.4771779},
doi = {10.1109/MICRO.2008.4771779},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/ChenA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/AamodtC07,
author = {Tor M. Aamodt and
Paul Chow},
editor = {Burton J. Smith},
title = {Optimization of data prefetch helper threads with path-expression
based statistical modeling},
booktitle = {Proceedings of the 21th Annual International Conference on Supercomputing,
{ICS} 2007, Seattle, Washington, USA, June 17-21, 2007},
pages = {210--221},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1274971.1275001},
doi = {10.1145/1274971.1275001},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/AamodtC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FungSYA07,
author = {Wilson W. L. Fung and
Ivan Sham and
George L. Yuan and
Tor M. Aamodt},
title = {Dynamic Warp Formation and Scheduling for Efficient {GPU} Control
Flow},
booktitle = {40th Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-40} 2007), 1-5 December 2007, Chicago, Illinois, {USA}},
pages = {407--420},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/MICRO.2007.30},
doi = {10.1109/MICRO.2007.30},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/FungSYA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AamodtCHWS04,
author = {Tor M. Aamodt and
Paul Chow and
Per Hammarlund and
Hong Wang and
John Paul Shen},
title = {Hardware Support for Prescient Instruction Prefetch},
booktitle = {10th International Conference on High-Performance Computer Architecture
{(HPCA-10} 2004), 14-18 February 2004, Madrid, Spain},
pages = {84--95},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/HPCA.2004.10028},
doi = {10.1109/HPCA.2004.10028},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AamodtCHWS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmetrics/AamodtMCGHWS03,
author = {Tor M. Aamodt and
Pedro Marcuello and
Paul Chow and
Antonio Gonz{\'{a}}lez and
Per Hammarlund and
Hong Wang and
John Paul Shen},
editor = {Bill Cheng and
Satish K. Tripathi and
Jennifer Rexford and
William H. Sanders},
title = {A framework for modeling and optimization of prescient instruction
prefetch},
booktitle = {Proceedings of the International Conference on Measurements and Modeling
of Computer Systems, {SIGMETRICS} 2003, June 9-14, 2003, San Diego,
CA, {USA}},
pages = {13--24},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/781027.781030},
doi = {10.1145/781027.781030},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sigmetrics/AamodtMCGHWS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AamodtC00,
author = {Tor M. Aamodt and
Paul Chow},
title = {Embedded {ISA} support for enhanced floating-point to fixed-point
{ANSI-C} compilation},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {128--137},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354899},
doi = {10.1145/354880.354899},
timestamp = {Tue, 06 Nov 2018 11:07:42 +0100},
biburl = {https://dblp.org/rec/conf/cases/AamodtC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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