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ORCIDJournal of Signal Processing Systems, Volume 87
Volume 87, Number 1, April 2017
- Editorial Note. 1
- Robert J. Stewart
, Deepayan Bhowmik, Andrew M. Wallace, Greg Michaelson:
Profile Guided Dataflow Transformation for FPGAs and CPUs. 3-20 - Lee Barford, Shuvra S. Bhattacharyya, Yanzhou Liu:
Data Flow Algorithms for Processors with Vector Extensions - Handling Actors With Internal State. 21-31 - Simon Holmbacka, Erwan Nogues, Maxime Pelcat, Sébastien Lafond, Daniel Ménard, Johan Lilius:
Energy-Awareness and Performance Management with Parallel Dataflow Applications. 33-48 - Zain-ul-Abdin, Mingkun Yang:
A Radar Signal Processing Case Study for Dataflow Programming of Manycores. 49-62 - Thanh Dinh Ngo, Kevin J. M. Martin, Jean-Philippe Diguet:
Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs. 63-80 - Francesca Palumbo, Tiziana Fanni, Carlo Sau, Paolo Meloni:
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy. 81-106 - George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Frank Fruth:
Implementation, Scheduling, and Adaptation of Partial Expansion Graphs on Multicore Platforms. 107-125 - Khaled Jerbi, Hervé Yviquel, Alexandre Sanchez, Daniele Renzi, Damien de Saint Jorre, Claudio Alberti, Marco Mattavelli, Mickaël Raulet:
On the Development and Optimization of HEVC Video Decoders Using High-Level Dataflow Modeling. 127-138 - Moslem Amiri, Fahad Manzoor Siddiqui, Colm Kelly, Roger F. Woods, Karen Rafferty, Burak Bardak:
FPGA-Based Soft-Core Processors for Image Processing Applications. 139-156 - Marc Geilen, Joachim Falk, Christian Haubelt, Twan Basten, Bart D. Theelen, Sander Stuijk:
Performance Analysis of Weakly-Consistent Scenario-Aware Dataflow Graphs. 157-175
Volume 87, Number 2, May 2017
- Editorial Note. 177
- Antonio Oseas de Carvalho Filho, Aristófanes Corrêa Silva, Anselmo Cardoso de Paiva, Rodolfo Acatauassu Nunes, Marcelo Gattass:
Lung-Nodule Classification Based on Computed Tomography Using Taxonomic Diversity Indexes and an SVM. 179-196 - He Tang, Chuanbo Chen, Yanan Bie:
Prediction of Human Eye Fixation by a Single Filter. 197-202 - Hedi Amri, Ali Khalfallah, Malek Gargouri, Naima Nebhani, Jean-Christophe Lapayre, Mohamed Salim Bouhlel:
Medical Image Compression Approach Based on Image Resizing, Digital Watermarking and Lossless Compression. 203-214 - Dongqi Wang, Dongming Chen, Ben Ma, Lisheng Xu, Jiliang Zhang:
A High Capacity Spatial Domain Data Hiding Scheme for Medical Images. 215-227 - Hui Sup Cho, Young-Jin Park, Hong-Kun Lyu, Jin-Ho Cho:
Novel Heart Rate Detection Method Using UWB Impulse Radar. 229-239 - Xu Liu, Zhong Ji, Yuran Tang:
Recognition of Pulse Wave Feature Points and Non-invasive Blood Pressure Measurement. 241-248 - Yantao Song, Zexuan Ji, Quan-Sen Sun, Yuhui Zheng:
A Novel Brain Tumor Segmentation from Multi-Modality MRI via A Level-Set-Based Model. 249-257 - Lin Gao, Tongsheng Zhang, Jue Wang, Julia M. Stephen:
A Pilot Study on Brain Source Localization and Connectivity Analysis with MEG Responses to Unilateral Tactile Stimuli in Healthy Children Using Normalized Principal Component Analysis. 259-267
Volume 87, Number 3, June 2017
- Peeter Ellervee, Jari Nurmi:
Guest Editorial: Implementation Issues in System-on-Chip. 269-270 - Feriel Ben Abdallah, Chiraz Trabelsi, Rabie Ben Atitallah, Mourad Abed:
Model-Driven Approach for Early Power-Aware Design Space Exploration of Embedded Systems. 271-286 - Waqar Hussain, Henry Hoffmann, Tapani Ahonen, Jari Nurmi:
Power Mitigation by Performance Equalization in a Heterogeneous Reconfigurable Multicore Architecture. 287-297 - Martin Broich, Tobias G. Noll:
Optimal Datapath Widths Within Turbo and Viterbi Decoders for High Area- and Energy-Efficiency. 299-325 - Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn:
A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. 327-341 - Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický:
Design of a Residue Number System Based Linear System Solver in Hardware. 343-356 - Christoforos Kachris, Dionysios Diamantopoulos, Georgios Ch. Sirakoulis, Dimitrios Soudris:
An FPGA-based Integrated MapReduce Accelerator Platform. 357-369 - Elena Dubrova, Mats Näslund, Gunnar Carlsson, John Fornehed, Ben J. M. Smeets:
Two Countermeasures Against Hardware Trojans Exploiting Non-Zero Aliasing Probability of BIST. 371-381
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