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SIGARCH Computer Architecture News, Volume 24
Volume 24, Number 1, March 1996
- Trevor N. Mudge:
Report on the panel: "how can computer architecture researchers avoid becoming the society for irreproducible results?". 1-5 - Oh-Young Kwon, Gi-Ho Park, Tack-Don Han:
A compiler optimization to reduce execution time of loop nest. 6-11 - Mark Thorson:
Internet Nuggets. 12-16 - Daniel Tabak:
Book Review: Alpha Implementations and Architecture by Dileep P. Bhandarkar. 17-18
Volume 24, Number 2, May 1996
- Jean-Loup Baer:
Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, PA, USA, May 22-24, 1996. ACM 1996, ISBN 0-89791-786-3 [contents]
Volume 24, Number 3, 1996
- Jesús Carretero, Fernando Pérez, Pedro de Miguel, Francisco García, L. Alonso:
A massively parallel and distributed I/O subsystem. 1-8 - Walter B. Ligon III, Daniel C. Stanzione Jr.:
Distributing and load-balancing for loops in scientific applications. 9-17 - Samson Belayneh, David R. Kaeli:
A discussion on non-blocking/lockup-free caches. 18-25 - Mark Thorson:
Internet Nuggets. 26-32
Volume 24, Number 4, September 1996
- Gerard Páez-Monzón, Charles Páez-Monzón:
The RISC processor DMN-6: a unified data-control flow architecture. 3-10 - Juan Antonio Gómez Pulido, Juan M. Sánchez-Pérez, José Antonio Moreno Zamora:
An educational tool for testing hierarchical multilevel caches. 11-15 - Samson Belayneh, David R. Kaeli:
A discussion on non-blocking/lockup-free caches. 16 - Mark Rosenbaum:
Architectural potholes. 17-18 - Adrian Cockcroft:
I/O potholes. 18-19 - John R. Mashey:
Architectural potholes. 18 - Zahir Ebrahim:
I/O potholes. 19-20 - Brad Carlile:
Interpreting benchmarks. 20-21 - David Chase:
Register windows. 21 - Paul W. DeMone:
Register windows and delay slots. 21-22
Volume 24, Number 5, December 1996
- Charlton D. Rose, J. Kelly Flanagan:
Constructing instruction traces from cache-filtered address traces (CITCAT). 1-8 - Susan Flynn Hummel:
Efficient data sharing with conditional remote memory transfers. 9-17 - Larry Widigen, Elliot Sowadsky, Kevin McGrath:
Eliminating operand read latency. 18-22 - Philip Machanick
:
The case for SRAM main memory. 23-30
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