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ORCIDJournal of Instruction-Level Parallelism, Volume 6
Volume 6, 2004
- Harold W. Cain, Mikko H. Lipasti, Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs. - Dong-yuan Chen, Lixia Liu, Roy Dz-Ching Ju, Chen Fu, Shuxin Yang, Chengyong Wu:
Efficient Modeling of Itanium Architecture during Instruction Scheduling using Extended Finite State Automata. - Phuong Hoai Ha, Philippas Tsigas:
Reactive Multi-word Synchronization for Multiprocessors. - Toshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani:
Structural Path Profiling: An Efficient Online Path Profiling Framework for Just-In-Time Compilers.
- Jiwei Lu, Howard Chen, Pen-Chung Yew, Wei-Chung Hsu:
Design and Implementation of a Lightweight Dynamic Optimization System. - Romain Dolbeau, André Seznec:
CASH: Revisiting Hardware Sharing in Single-Chip Parallel Processors. - Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng:
The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. - Volker Strumpen, Henry Hoffmann, Anant Agarwal:
Stream Algorithms and Architecture. - Diego Puppin, Mark Stephenson, Saman P. Amarasinghe:
Convergent Scheduling. - Lu Peng, Jih-Kwon Peir, Konrad Lai:
A New Address-Free Memory Hierarchy Layer for Zero-Cycle Load.
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