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Formal Methods in System Design, Volume 31
Volume 31, Number 1, August 2007
- Roberto Passerone
, Jerry R. Burch, Alberto L. Sangiovanni-Vincentelli
:
Refinement preserving approximations for the design and verification of heterogeneous systems. 1-33 - Abhay Vardhan, Mahesh Viswanathan:
Learning to verify branching time properties. 35-61 - Gianfranco Ciardo
, Gerald Lüttgen, Andrew S. Miner
:
Exploiting interleaving semantics in symbolic state-space generation. 63-100
Volume 31, Number 2, October 2007
- Béatrice Bérard, Paul Gastin, Antoine Petit:
Timed substitutions for regular signal-event languages. 101-134 - Patricia Bouyer, Thomas Brihaye, Véronique Bruyère, Jean-François Raskin:
On the optimal reachability problem of weighted timed automata. 135-175 - Roberto Sebastiani, Eli Singerman, Stefano Tonetta, Moshe Y. Vardi:
GSTE is partitioned model checking. 177-196
Volume 31, Number 3, December 2007
- A. Prasad Sistla, Xiaodong Wang, Min Zhou:
Checking extended CTL properties using guarded quotient structures. 197-219 - Clark W. Barrett
, Leonardo Mendonça de Moura, Aaron Stump:
Design and results of the 2nd annual satisfiability modulo theories competition (SMT-COMP 2006). 221-239 - Zoltán Ádám Mann, András Orbán, Péter Arató
:
Finding optimal hardware/software partitions. 241-263 - Salvatore La Torre, Margherita Napoli
, Mimmo Parente
:
The word problem for visibly pushdown languages described by grammars. 265-279 - Thuan Quang Huynh, Abhik Roychoudhury
:
Memory model sensitive bytecode verification. 281-305
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