default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID8th WISES 2010: Heraklion, Crete, Greece
- Miltos D. Grammatikakis, George Kornaros, Nikos Papadakis:
8th Workshop on Intelligent Solutions in Embedded Systems, WISES 2010, Heraklion, Crete, Greece, July 8-9, 2010. IEEE 2010, ISBN 978-1-4244-5715-1 - Mahboobeh Shariat, Nima Azizibabani:
Reducing router's area in NoC by changing buffering method while providing QoS. 1-5 - Gian Carlo Cardarilli
, Luca Di Nunzio, Rocco Fazzolari, Marco Re:
Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit. 6-11 - Michael Steindl, Jürgen Mottok, Hans Meier:
SES-based framework for fault-tolerant systems. 12-16 - Javier Martínez Fernández, Ralf Seepold, Juan Carlos Augusto, Natividad Martínez Madrid:
Sensors in trading process: A Stress - Aware Trader. 17-22 - Jussi Kiljander, Matti Eteläperä, Janne Takalo-Mattila, Juha-Pekka Soininen:
Opening information of low capacity embedded systems for Smart Spaces. 23-28 - Jesús Sáez Gómez-Escalonilla, Julio Ángel Cano Romero, Natividad Martínez Madrid, Ralf Seepold:
A gateway-based solution for remote accessing to residential UPnP services networks. 29-34 - Michael Schorer, Stefan Kuntz, Jürgen Mottok:
Verification of behavioral compatibility in the Virtual Integration methodology. 35-42 - Apostolos Meliones:
A comprehensive development guide for network embedded systems. 43-48 - Björn Andersson, Nuno Pereira, Eduardo Tovar, Filipe Pacheco:
Using a prioritized MAC protocol to execute the database operation join in networked embedded computer systems. 49-54 - Pieretti Andrea, Cristiano Scavongelli, Simone Orcioni, Massimo Conti:
Performance analysis of JPEG 2000 over 802.15.4 wireless image sensor network. 55-60 - Aleksander Pruszkowski, Tomasz Paczesny, Jaroslaw Domaszewicz:
From C to VM-targeted executables: Techniques for heterogeneous sensor/actuator networks. 61-66 - Ulas Yaman, Melik Dolen, A. Bugra Koku:
A novel command generation method with variable feedrate utilizing FGPA for motor drives. 67-72 - Nikos Petrellis, Michael K. Birbas, John C. Kikidis, Alexios N. Birbas:
Selecting appropriate calibration points for an ultra low area 8-bit subrange ADC. 73-78 - Rocco D. d'Aparo, Giorgio Crostella, Davide Nicoletti, Simone Orcioni, Massimo Conti:
DC-AC power converter using sigma-delta modulation. 79-84 - Alessio Ercole De Stephanis, Massimo Conti, Marco Caldari, Franco Ripa:
Design refinement for the development of an audio dynamic range controller. 85-90 - Fabio Di Franco, Christos Tachtatzis, Ben Graham, Marek Bykowski, David C. Tracey, Nick F. Timmons, Jim Morrison:
Current characterisation for ultra low power wireless body area networks. 91-96 - Kai Lutz, Andreas König:
Minimizing power consumption in wireless sensor networks by duty-cycled reconfigurable sensor electronics. 97-102 - Constantinos Stefanatos, Ioannis Papaefstathiou, Charalampos Manifavas:
Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA). 103-107 - Bhuvana Kakunoori, Sreekumar Choyar Madathil:
Hardware support for dynamic scheduling in multiprocessor Operating System. 108-113
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-09-29 00:26 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
