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ORCIDSBAC-PAD 2002: Vitoria, Espirito Santo, Brazil
- 14th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2002), 28-30 October 2002, Vitoria, Espirito Santo, Brazil. IEEE Computer Society 2002, ISBN 0-7695-1772-2
Invited Paper
- Ronald H. Perrott:
Infrastructure, Requirements and Applications for e-Science. 3-12
Application-Specific Architectures
- Johann Großschädl:
Instruction Set Extension for Long Integer Modulo Arithmetic on RISC-Based Smart Cards. 13-19 - Manuel L. Anido, Nader Bagherzadeh, Nozar Tabrizi, Haitao Du, Marcos Sánchez-Élez
:
Interactive Ray Tracing Using a SIMD Reconfigurable Architecture. 20-28 - Dênis Fernandes, J. Stedile, Philippe Olivier Alexandre Navaux:
Architecture of Oscillatory Neural Network for Image Segmentation. 29-38
High Performance Applications
- G. Sipahi, Gonzalo Travieso:
Simulating Semiconductor Spectra Emissions in a PC Cluster. 39-43 - Renato Silva, Marconi F. P. Rivello, Ricardo Amorim:
Improving the Communication Network of a Cluster of PC's to Solve Implicit CFD Problems. 44-50 - Manoel T. F. Cunha, Jose C. F. Telles, Alvaro L. G. A. Coutinho:
Parallel Boundary Elements Using Lapack and ScaLapack. 51-60
Parallel and Distributed Programming: Algorithms and Tools
- Rafael Dueire Lins:
Efficient Cyclic Weighted Reference Counting. 61-67 - Rafael Paoliello Guimarães, Walter da Cunha Borelli:
Generating Java Code for TINA Systems. 68-74 - D. Ruchkys, Siang Wun Song:
A Parallel Approximation Hitting Set Algorithm for Gene Expression Analysis. 75-81 - André Rauber Du Bois, Robert F. Pointon, Hans-Wolfgang Loidl, Philip W. Trinder:
Implementing Declarative Parallel Bottom-Avoiding Choice. 82-92
Cache and Memory Architectures
- Jin-Hyuck Choi, Jung-Hoon Lee, Gi-Ho Park, Shin-Dug Kim:
An Advanced Filtering TLB for Low Power Consumption. 93-99 - Andrés Djordjalian:
Minimally-Skewed-Associative Caches. 100-107 - Myles Watson, J. Kelly Flanagan:
Simulating L3 Caches in Real Time Using Hardware Accelerated Cache Simulation (HACS): A Case Study with SPECint 2000. 108-116
Grid, Multimedia, and Cluster-Based Computing
- Leonardo Bidese de Pinho, Claudio Luis de Amorim, Edison Ishikawa:
GloVE: A Distributed Environment for Low Cost Scalable VoD Systems. 117-124 - Adenauer C. Yamin, Jorge L. V. Barbosa, Iara Augustin, Luciano Cavalheiro da Silva, Rodrigo Araújo Real, Cláudio F. R. Geyer, Gerson G. H. Cavalheiro:
A Framework for Exploiting Adaptation in Highly Heterogeneous Distributed Processing. 125-132 - Cristina Boeres, Vinod E. F. Rebello:
Cluster-Based Static Scheduling: Theory and Practice. 133-140 - César A. F. De Rose, Franco Blanco, Nicolas Maillard, Katia Barbosa Saikoski, Reynaldo Novaes, Olivier Richard, Bruno Richard:
The Virtual Cluster: A Dynamic Environment for Exploitation of Idle Network Resources. 141-150
Distributed Shared Memory
- E. Pineschi, Maria Clicia Stelling de Castro, Claudio Luis de Amorim:
Design and Evaluation of Data Access Prediction Strategies in SDSM Systems. 151-158 - Thobias S. Trevisan, Vítor Santos Costa, Lauro Whately, Claudio Luis de Amorim:
Distributed Shared Memory in Kernel Mode. 159-168
Processor Architecture
- Edil S. T. Fernandes, Valmir Carneiro Barbosa, Fabiano Ramos:
Instruction Usage and the Memory Gap Problem. 169-175 - D. Becker, J. Otero, Flávio Rech Wagner:
T&D-Bench: An Environment for Modeling and Simulating Complex Processor Architectures. 176-183 - Clecio Donizete Lima, Tadao Nakamura:
Exploiting Loop-Level Parallelism with the Shift Architecture. 184-194
Performance Analysis and Tools
- Anca I. D. Bucur, Dick H. J. Epema:
An Evaluation of Processor Co-allocation for Different System Configurations and Job Structures. 195-203 - Luís Fabrício Wanderley Góes, Luiz Eduardo da Silva Ramos, Carlos Augusto Paiva da Silva Martins:
Performance Analysis of Parallel Programs Using Prober as a Single Aid Tool. 204-211 - Yan Jenny Liu:
Performance and Scalability Measurement of COTS EJB Technology. 212-220
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