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34th RSP 2023: Hamburg, Germany
- Proceedings of the 34th International Workshop on Rapid System Prototyping, RSP 2023, Hamburg, Germany, 21 September 2023. ACM 2023
- Choonghoon Park
, Hyunsu Moh
, Jimin Lee
, Changjae Yi
, Soonhoi Ha
:
Fast and Accurate Virtual Prototyping of an NPU with Analytical Memory Modeling. 01:1-01:7 - Navid Jafarof
, Kenneth B. Kent
:
The Impact of Heterogeneous Logic on Adders and Multipliers in VTR. 02:1-02:7 - Mohamed A. Nadeem
, Jan Kleinekathöfer
, Rolf Drechsler
:
Polynomial Formal Verification exploiting Constant Cutwidth. 03:1-03:7 - Felipe G. Magalhaes
, Mahdi Nikdast
, Gabriela Nicolescu
:
SerIOS: Enhancing Hardware Security in Integrated Optoelectronic Systems. 04:1-04:7 - Alireza Azadi
, Amir Arjomand
, Kenneth B. Kent
:
Extending Memory Compatibility with Yosys Front-End in VTR Flow. 05:1-05:8 - Tobias Strauch
:
MRPHS: A Verilog RTL to C++ Model Compiler Using Intermediate Representations for Object-oriented Model-driven Prototyping. 06:1-06:7 - Raphaële Milan
, Loïc Lagadec
, Théotime Bollengier
, Lilian Bossuet
, Ciprian Teodorov
:
Secured-by-design systems-on-chip: a MBSE Approach. 07:1-07:7 - Henrique Amaral Misson
, Rim Zrelli
, Maroua Ben Attia
, Felipe Gohring de Magalhaes
, Gabriela Nicolescu
:
ReDaML: A Modeling Language for DO-178C High-Level Requirements in Airspace Systems. 08:1-08:7 - Colin Stephenne
, Felipe Gohring de Magalhaes
, Frédéric Cuppens
, Jean-Yves Ouattara
, Militza Jean
, Jose Fernandez
, Gabriela Nicolescu
:
Security assessment of a commercial router using physical access: a case study. 09:1-09:7 - Melih Peker
, Ozcan Ozturk
:
Fast Compiler Optimization Flag Selection. 10:1-10:5 - Fearghal Morgan
, John Patrick Byrne
, Abishek Bupathi
, Roshan George
, Muhammad Adnan Elahi
, Frank Callaly
, Sean Kelly
, Declan O'Loughlin
:
HDLGen-ChatGPT Case Study: RISC-V Processor VHDL and Verilog Model - Testbench and EDA Project Generation. 11:1-11:7

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