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ORCID30th RSP 2019: New York, NY, USA
- Proceedings of the 30th International Workshop on Rapid System Prototyping, RSP 2019, New York, NY, USA, October 17-18, 2019. ACM 2019, ISBN 978-1-4503-6847-6
Software
- Louis Bonicel
, Roland Bohrer, Benoit Leprettre, Frédéric Rousseau, Frédéric Pétrot:
Multi-Triggered Embedded Software Code Generation for Electrical Metering and Protection Applications. 1-7 - Keita Miura, Shota Tokunaga, Noriyuki Ota, Yoshiharu Tange, Takuya Azumi:
Autoware Toolbox: MATLAB/Simulink Benchmark Suite for ROS-based Self-driving Software Platform. 8-14 - Josue V. Quiroga, Martí Torrents, Nehir Sönmez, Dimitris Theodoropoulos, Ferad Zyulkyarov, Mario Nemirovsky:
Evaluation of a Rack-Scale Disaggregated Memory Prototype for Cloud Data Centers. 15-21
Security, Verification and Reliability
- Tobias Strauch:
Combining Simulation and FPGA Based Verification to an Affordable and Ultra-Fast Multi-Billion-Gate Verification System. 22-28 - Derek Yu, Michael Vaquier, Evan Laflamme, Gabrielle Doucette-Poirier, Justin Tremblay, Brett H. Meyer:
ARINC-825TBv2: A Hardware-in-the-Ioop Simulation Platform for Aerospace Security Research. 29-35 - Amira Guesmi, Ihsen Alouani, Mouna Baklouti, Tarek Frikha, Mohamed Abid, Atika Rivenq:
HEAP: A Heterogeneous Approximate Floating-Point Multiplier for Error Tolerant Applications. 36-42
System Modeling and Prototyping
- Salah Eddine Saidi, Amir Charif, Tanguy Sassolas, Pierre-Guillaume Le Guay, Henrique Vicente Souza, Nicolas Ventroux:
Fast Virtual Prototyping of Cyber-Physical Systems using SystemC and FMI: ADAS Use Case. 43-49 - Artur Rataj, Etienne Borde:
Fast and robust modelling using a direct translation from a robotic application to its abstracted behaviour. 50-56
Hardware
- Charles Hartsell, Nagabhushan Mahadevan, Shreyas Ramakrishna, Abhishek Dubey, Theodore Bapty, Taylor T. Johnson, Xenofon D. Koutsoukos, Janos Sztipanovits, Gabor Karsai:
CPS Design with Learning-Enabled Components: A Case Study. 57-63 - Riyane Sid Lakhdar, Henri-Pierre Charles, Maha Kooli:
Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization. 64-70 - Scott Ryan Young, Alexandrea Demmings, Nasrin Eshraghi Ivari, Jean-Philippe Legault, Kenneth B. Kent:
Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II. 71-74
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