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15th COSADE 2024: Gardanne, France

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Romain Wacquez, Naofumi Homma:
Constructive Side-Channel Analysis and Secure Design - 15th International Workshop, COSADE 2024, Gardanne, France, April 9-10, 2024, Proceedings. Lecture Notes in Computer Science 14595, Springer 2024, ISBN 978-3-031-57542-6

Analyses and Tools

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Amélie Marotta, Ronan Lashermes, Guillaume Bouffard, Olivier Sentieys, Rachid Dafali:
Characterizing and Modeling Synchronous Clock-Glitch Fault Injection. 3-21
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Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata:
On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injection. 22-37
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Arpan Jati, Naina Gupta, Anupam Chattopadhyay, Somitra Kumar Sanadhya:
EFFLUX-F2: A High Performance Hardware Security Evaluation Board. 38-56

Attack Methods

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Baris Ege, Bob Swinkels, Dilara Toprakhisar, Praveen Kumar Vadnala:
Practical Improvements to Statistical Ineffective Fault Attacks. 59-75
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Dilara Toprakhisar, Svetla Nikova, Ventzislav Nikov:
CAPABARA: A Combined Attack on CAPA. 76-89

Deep-learning-based Side-channel Attacks

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Thomas Marquet, Elisabeth Oswald:
Exploring Multi-task Learning in the Context of Masked AES Implementations. 93-112
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Ioana Savu, Marina Krcek, Guilherme Perin, Lichao Wu, Stjepan Picek:
The Need for MORE: Unsupervised Side-Channel Analysis with Single Network Training and Multi-output Regression. 113-132
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Fabian Schmid, Shibam Mukherjee, Stjepan Picek, Marc Stöttinger, Fabrizio De Santis, Christian Rechberger:
Towards Private Deep Learning-Based Side-Channel Analysis Using Homomorphic Encryption - Opportunities and Limitations. 133-154

PUF/RNG

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Niklas Stein, Michael Pehl:
Leakage Sources of the ICLooPUF: Analysis of a Side-Channel Protected Oscillator-Based PUF. 157-176
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Javad Bahrami, Mohammad Ebrahimabadi, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi:
Impact of Process Mismatch and Device Aging on SR-Latch Based True Random Number Generators. 177-196
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Mustafa Khairallah, Srinivasan Yadhunathan, Shivam Bhasin:
Lightweight Leakage-Resilient PRNG from TBCs Using Superposition. 197-217

Cryptographic Implementations

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Patrick Karl, Jonas Schupp, Georg Sigl:
The Impact of Hash Primitives and Communication Overhead for Hardware-Accelerated SPHINCS+. 221-239
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Oussama Sayari, Soundes Marzougui, Thomas Aulbach, Juliane Krämer, Jean-Pierre Seifert:
HaMAYO: A Fault-Tolerant Reconfigurable Hardware Implementation of the MAYO Signature Scheme. 240-259
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Nicolas Belleville, Loïc Masure:
Combining Loop Shuffling and Code PolyMorphism for Enhanced AES Side-Channel Security. 260-280

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