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Author search results
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- George A. Constantinides
aka: George Anthony Constantinides
Imperial College London, UK - George M. Constantinides
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Publication search results
found 326 matches
- 2024
- Martin Langhammer, George A. Constantinides:
A Statically and Dynamically Scalable Soft GPGPU. FPGA 2024: 165-175 - Martin Langhammer, George A. Constantinides:
A Statically and Dynamically Scalable Soft GPGPU. CoRR abs/2401.04261 (2024) - Cheng Zhang, Jianyi Cheng, George A. Constantinides, Yiren Zhao:
LQER: Low-Rank Quantization Error Reconstruction for LLMs. CoRR abs/2402.02446 (2024) - Marta Andronic, George A. Constantinides:
NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions. CoRR abs/2403.00849 (2024) - 2023
- Ian McInerney, Eric C. Kerrigan, George A. Constantinides:
Horizon-Independent Preconditioner Design for Linear Predictive Control. IEEE Trans. Autom. Control. 68(1): 580-587 (2023) - Jianyi Cheng, Estíbaliz Fraca, John Wickerson, George A. Constantinides:
Balancing Static Islands in Dynamically Scheduled Circuits Using Continuous Petri Nets. IEEE Trans. Computers 72(11): 3300-3313 (2023) - Erwei Wang, James J. Davis, Daniele Moro, Piotr Zielinski, Jia Jie Lim, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides:
Enabling Binary Neural Network Training on the Edge. ACM Trans. Embed. Comput. Syst. 22(6): 105:1-105:19 (2023) - Jianyi Cheng, Lana Josipovic, John Wickerson, George A. Constantinides:
Parallelising Control Flow in Dynamic-scheduling High-level Synthesis. ACM Trans. Reconfigurable Technol. Syst. 16(4): 55:1-55:32 (2023) - Erwei Wang, Marie Auffret, Georgios-Ilias Stavrou, Peter Y. K. Cheung, George A. Constantinides, Mohamed S. Abdelfattah, James J. Davis:
Logic Shrinkage: Learned Connectivity Sparsification for LUT-Based Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 16(4): 57:1-57:25 (2023) - Andy Wanna, Samuel Coward, Theo Drane, George A. Constantinides, Milos D. Ercegovac:
Multiplier Optimization via E-Graph Rewriting. ACSSC 2023: 1528-1533 - Morteza Rezaalipour, Lorenzo Ferretti, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi:
ErrorEval: an Open-Source Worst-Case-Error Evaluation Framework for Approximate Computing. CF 2023: 393-394 - Samuel Coward, George A. Constantinides, Theo Drane:
Automating Constraint-Aware Datapath Optimization using E-Graphs. DAC 2023: 1-6 - Morteza Rezaalipour, Marco Biasion, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi:
A Parametrizable Template for Approximate Logic Synthesis. DSN-W 2023: 175-178 - Morteza Rezaalipour, Lorenzo Ferretti, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi:
Multi-Metric SMT-Based Evaluation of Worst-Case-Error for Approximate Circuits. DSN-W 2023: 199-202 - Cheng Zhang, Jianyi Cheng, Ilia Shumailov, George A. Constantinides, Yiren Zhao:
Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference? EMNLP 2023: 9988-10006 - Benjamin Biggs, Christos-Savvas Bouganis, George A. Constantinides:
ATHEENA: A Toolflow for Hardware Early-Exit Network Automation. FCCM 2023: 121-132 - Samuel Coward, Emiliano Morini, Bryan Tan, Theo Drane, George A. Constantinides:
Datapath Verification via Word-Level E-Graph Rewriting. FMCAD 2023: 92-100 - Martin Langhammer, George A. Constantinides:
eGPU: A 750 MHz Class Soft GPGPU for FPGA. FPL 2023: 277-282 - Marta Andronic, George A. Constantinides:
PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference. ICFPT 2023: 60-68 - Benjamin Ramhorst, Vladimir Loncar, George A. Constantinides:
FPGA Resource-aware Structured Pruning for Real-Time Neural Networks. ICFPT 2023: 282-283 - Samuel Coward, George A. Constantinides, Theo Drane:
Combining E-Graphs with Abstract Interpretation. SOAP@PLDI 2023: 1-7 - Samuel Coward, George A. Constantinides, Theo Drane:
Automating Constraint-Aware Datapath Optimization using E-Graphs. CoRR abs/2303.01839 (2023) - Benjamin Biggs, Christos-Savvas Bouganis, George A. Constantinides:
ATHEENA: A Toolflow for Hardware Early-Exit Network Automation. CoRR abs/2304.08400 (2023) - Martin Langhammer, George A. Constantinides:
eGPU: A 750 MHz Class Soft GPGPU for FPGA. CoRR abs/2307.08378 (2023) - Samuel Coward, Emiliano Morini, Bryan Tan, Theo Drane, George A. Constantinides:
Datapath Verification via Word-Level E-Graph Rewriting. CoRR abs/2308.00431 (2023) - Benjamin Ramhorst, George A. Constantinides, Vladimir Loncar:
FPGA Resource-aware Structured Pruning for Real-Time Neural Networks. CoRR abs/2308.05170 (2023) - Marta Andronic, George A. Constantinides:
PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference. CoRR abs/2309.02334 (2023) - Cheng Zhang, Jianyi Cheng, Ilia Shumailov, George A. Constantinides, Yiren Zhao:
Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference? CoRR abs/2310.05079 (2023) - Andy Wanna, Samuel Coward, Theo Drane, George A. Constantinides, Milos D. Ercegovac:
Multiplier Optimization via E-Graph Rewriting. CoRR abs/2312.06004 (2023) - 2022
- Jianyi Cheng, Shane T. Fleming, Yu Ting Chen, Jason Helge Anderson, John Wickerson, George A. Constantinides:
Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code. IEEE Trans. Computers 71(4): 933-946 (2022)
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