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Publication search results
found 121 matches
- 2024
- Yong Wook Kim, Tae Hee Han:
OWBM: OSNR-Aware Wavelength Allocation and Branching Methods for Multicast Routing in Custom Topology-Based Optical Network-on-Chips. IEEE Access 12: 49508-49527 (2024) - Michal Bukowski, Jaroslaw Kurek, Bartosz Swiderski, Albina Jegorowa:
Custom Loss Functions in XGBoost Algorithm for Enhanced Critical Error Mitigation in Drill-Wear Analysis of Melamine-Faced Chipboard. Sensors 24(4): 1092 (2024) - 2023
- Wenwen Fu, Wei Quan, Jinli Yan, Zhigang Sun:
Fenglin-I: An Open-Source Time-Sensitive Networking Chip Enabling Agile Customization. IEEE Trans. Computers 72(1): 140-153 (2023) - Young Sik Lee, Yong Wook Kim, Tae Hee Han:
MRCN: Throughput-Oriented Multicast Routing for Customized Network-on-Chips. IEEE Trans. Parallel Distributed Syst. 34(1): 163-179 (2023) - A. Alper Goksoy, Sizhe An, Ümit Y. Ogras:
Energy-Efficient On-Chip Training for Customized Home-based Rehabilitation Systems. DAC 2023: 1-6 - Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
Sparse Hamming Graph: A Customizable Network-on-Chip Topology. DAC 2023: 1-6 - Yan-Lin Chen, Wei-Che Tseng, Wei-Yao Kao, Yao-Wen Chang:
A General Wavelength-Routed Optical Networks-on-Chip Model with Applications to Provably Good Customized and Fault-Tolerant Topology Designs. ICCAD 2023: 1-7 - 2022
- Yong Zheng, Haigang Yang, Yi Shu, Yiping Jia, Zhihong Huang:
mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips. IEEE Embed. Syst. Lett. 14(3): 143-146 (2022) - Somayeh Kashi, Ahmad Patooghy, Dara Rahmati, Mahdi Fazeli:
A multi-application approach for synthesizing custom network-on-chips. J. Supercomput. 78(13): 15358-15380 (2022) - Yu-Hsiang Chiang, Tian-Sheuan Chang, Shyh-Jye Jou:
A 14 μJ/Decision Keyword-Spotting Accelerator With In-SRAMComputing and On-Chip Learning for Customization. IEEE Trans. Very Large Scale Integr. Syst. 30(9): 1184-1192 (2022) - Huseyin Ekin Sumbul, Tony F. Wu, Yuecheng Li, Syed Shakib Sarwar, William Koven, Eli Murphy-Trotzky, Xingxing Cai, Elnaz Ansari, Daniel H. Morris, Huichu Liu, Doyun Kim, Edith Beigné:
System-Level Design and Integration of a Prototype AR/VR Hardware Featuring a Custom Low-Power DNN Accelerator Chip in 7nm Technology for Codec Avatars. CICC 2022: 1-8 - Yu-Hsiang Chiang, Tian-Sheuan Chang, Shyh-Jye Jou:
A 14uJ/Decision Keyword Spotting Accelerator with In-SRAM-Computing and On Chip Learning for Customization. CoRR abs/2205.04665 (2022) - Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
Sparse Hamming Graph: A Customizable Network-on-Chip Topology. CoRR abs/2211.13980 (2022) - 2021
- Soowang Park, Jae-Won Nam, Sandeep K. Gupta:
HW-BCP: A Custom Hardware Accelerator for SAT Suitable for Single Chip Implementation for Large Benchmarks. ASP-DAC 2021: 29-34 - Mengdi Wang, Ying Wang, Cheng Liu, Lei Zhang:
Network-on-Interposer Design for Agile Neural-Network Processor Chip Customization. DAC 2021: 49-54 - Khai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Cong-Kha Pham:
A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-Chip. HCS 2021: 1-13 - Pete Ehrett, Todd M. Austin, Valeria Bertacco:
Chopin: Composing Cost-Effective Custom Chips with Algorithmic Chiplets. ICCD 2021: 395-399 - 2020
- Vincent A. Cicirello:
Chips-n-Salsa: A Java Library of Customizable, Hybridizable, Iterative, Parallel, Stochastic, and Self-Adaptive Local Search Algorithms. J. Open Source Softw. 5(52): 2448 (2020) - Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic:
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro 40(4): 10-21 (2020) - Ronny García-Ramírez, Alfonso Chacon-Rodriguez, Roberto Molina-Robles, Reinaldo Castro-Gonzalez, Egdar Solera-Bolanos, Gabriel Madrigal-Boza, Marco Oviedo-Hernández, Diego Salazar-Sibaja, Dayhana Sanchez-Jimenez, Melissa Fonseca-Rodriguez, Johan Arrieta-Solorzano, Renato Rimolo-Donadio, Alfredo Arnaud, Matías R. Miguez, Joel Gak:
Siwa: A custom RISC-V based system on chip (SOC) for low power medical applications. Microelectron. J. 98: 104753 (2020) - Fei Tan, Yiming Wang, Yiming Yang, Liran Li, Tian Wang, Feng Zhang, Xinghua Wang, Jianfeng Gao, Yongpan Liu:
A ReRAM-Based Computing-in-Memory Convolutional-Macro With Customized 2T2R Bit-Cell for AIoT Chip IP Applications. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1534-1538 (2020) - Anup Gangwar, Nitin Kumar Agarwal, Ravishankar Sreedharan, Ambica Prasad, Sri Harsha Gade, Zheng Xu:
Automated Synthesis of Custom Networks-on-Chip for Real World Applications. ICCAD 2020: 41:1-41:9 - Wenwen Fu, Jinli Yan, Wei Quan, Zhigang Sun:
Fenglin-I: an open-source TSN chip for scenario-driven customization. SIGCOMM Posters and Demos 2020: 60-61 - 2019
- Wei Gao, Pingqiang Zhou:
Customized High Performance and Energy Efficient Communication Networks for AI Chips. IEEE Access 7: 69434-69446 (2019) - N. L. Venkataraman, Rajagopal Kumar:
Design and analysis of application specific network on chip for reliable custom topology. Comput. Networks 158: 69-76 (2019) - Pinar Kullu, Suleyman Tosun:
Energy-aware and fault-tolerant custom topology design method for network-on-chips. Nano Commun. Networks 19: 54-66 (2019) - Jason Cong, Zhenman Fang, Muhuan Huang, Peng Wei, Di Wu, Cody Hao Yu:
Customizable Computing - From Single Chip to Datacenters. Proc. IEEE 107(1): 185-203 (2019) - Yu-De Huang, Kai-Yen Wang, Yun-Lung Ho, Chang-Yuan He, Wai-Chi Fang:
An Edge AI System-on-Chip Design with Customized Convolutional-Neural-Network Architecture for Real-time EEG-Based Affective Computing System. BioCAS 2019: 1-4 - 2018
- Ronaldo Ponte, Vasiliki Giagka, Wouter A. Serdijn:
Design and Custom Fabrication of a Smart Temperature Sensor for an Organ-on-a-chip Platform. BioCAS 2018: 1-4 - Truong Phu Truan Ho, Chip-Hong Chang:
Towards Ideal Lattice-Based Cryptography on ASIC: A Custom Implementation of Number Theoretic Transform. DSP 2018: 1-5
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