dblp.uni-trier.dewww.uni-trier.de

Qing Zhu (Selection)

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo


5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLQing Zhu, Wayne Wei-Ming Dai: Planar clock routing for high performance chip and package co-design. IEEE Trans. VLSI Syst. 4(2): 210-226 (1996)
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLQing Zhu, Wayne Wei-Ming Dai: High-speed clock network sizing optimization based on distributed RC and lossy RLC interconnect models. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1106-1118 (1996)
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLQing Zhu, Wayne Wei-Ming Dai, Joe G. Xi: Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models. ICCAD 1993: 628-633
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLQing Zhu, Wayne Wei-Ming Dai: Perfect-balance planar clock routing with minimal path-length. ICCAD 1992: 473-476

Selection of 4 from 12 records - Qing Zhu has 29 coauthors

Copyright © 2009-12-01 by Michael Ley (ley@uni-trier.de)