Michael Zhang (Selection)

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4 Michael Zhang, Krste Asanovic: Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. ISCA 2005: 336-345

3 Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic: Accelerating Multiprocessor Simulation with a Memory Timestamp Record. ISPASS 2005: 66-77

2 Michael Zhang, Krste Asanovic: Fine-grain CAM-tag cache resizing using miss tags. ISLPED 2002: 130-135

1 Luis Villa, Michael Zhang, Krste Asanovic: Dynamic zero compression for cache energy reduction. MICRO 2000: 214-220

Selection of 4 from 7 records - Michael Zhang has 11 coauthors

4		Michael Zhang, Krste Asanovic: Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. ISCA 2005: 336-345
3		Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic: Accelerating Multiprocessor Simulation with a Memory Timestamp Record. ISPASS 2005: 66-77
2		Michael Zhang, Krste Asanovic: Fine-grain CAM-tag cache resizing using miss tags. ISLPED 2002: 130-135
1		Luis Villa, Michael Zhang, Krste Asanovic: Dynamic zero compression for cache energy reduction. MICRO 2000: 214-220