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Svetlana N. Yanushkevich (Selection)

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34Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLA. H. Tran, Svetlana N. Yanushkevich, Sergey Edward Lyshevski, Vlad P. Shmerko: Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks. ISMVL 2011: 93-98
32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Marina L. Gavrilova, Vlad P. Shmerko, Sergey Edward Lyshevski, Adrian Stoica, Ronald R. Yager: Belief trees and networks for biometric applications. Soft Comput. 15(1): 3-11 (2011)
29Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLS. Chague, B. Droit, Oleg Boulanov, Svetlana N. Yanushkevich, Vlad P. Shmerko, Adrian Stoica: Biometric-Based Decision Support Assistance in Physical Access Control Systems. BLISS 2008: 11-16
28Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Oleg Boulanov, Adrian Stoica, Vlad P. Shmerko: Support of Interviewing Techniques in Physical Access Control Systems. IWCF 2008: 147-158
24Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVlad P. Shmerko, Svetlana N. Yanushkevich, H. Moon, Adrian Stoica, Ronald R. Yager: Accelerating Decision Making Support in Biometric Assistant for Remote Temperature Measures. BLISS 2007: 11-14
23Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Vlad P. Shmerko: Introduction to the Special Issue: Nano MVL Structures. Multiple-Valued Logic and Soft Computing 13(3): 217-234 (2007)
21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Vlad P. Shmerko, Oleg Boulanov: Embedding and Assembling Techniques for Spatial Computing Structure Design using Decision Trees and Diagrams. ISMVL 2006: 29
19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Vlad P. Shmerko, L. Guy, D. C. Lu: Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic. ISMVL 2004: 275-280
17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVlad P. Shmerko, Svetlana N. Yanushkevich: Three-Dimensional Feedforward Neural Networks and Their Realization by Nano-Devices. Artif. Intell. Rev. 20(3-4): 473-494 (2003)
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Piotr Dziurzanski, Vlad P. Shmerko: The Word-Level Models for Efficient Computation of Multiple-Valued Functions. PART 1: LAR Based Model. ISMVL 2002: 202-208
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAnna M. Tomaszewska, Svetlana N. Yanushkevich, Vlad P. Shmerko: The Word-Level Models for Efficient Computation of Multiple-Valued Functions. PART 2: LWL Based Model. ISMVL 2002: 209-215
14no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Vlad P. Shmerko, V. D. Malyugin, Piotr Dziurzanski: Linearity of World-Level Circuit Models: New Understanding. IWLS 2002: 67-72
12no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLV. Cheushev, Svetlana N. Yanushkevich, Vlad P. Shmerko, Claudio Moraga, Joanna Kolodziejczyk: Information Theory Method for Flexible Network Synthesis. ISMVL 2001: 201-206
11no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAnna M. Tomaszewska, Piotr Dziurzanski, Svetlana N. Yanushkevich, Vlad P. Shmerko: Two-Stage Exact Detection of Symmetrics. ISMVL 2001: 213-
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJon T. Butler, Gerhard W. Dueck, Svetlana N. Yanushkevich, Vlad P. Shmerko: On the number of generators for transeunt triangles. Discrete Applied Mathematics 108(3): 309-316 (2001)
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, Vlad P. Shmerko, Joanna Kolodziejczyk: Application of Design Style in Evolutionary Multi-Level Networks Synthesis. EUROMICRO 2000: 1156-1163
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Jon T. Butler, Gerhard W. Dueck, Vlad P. Shmerko: Experiments on FPRM Expressions for Partially Symmetric Logic Functions. ISMVL 2000: 141-146
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, M. Opoka, Vlad P. Shmerko: Evolutionary Multi-Level Network Synthesis in Given Design Style. ISMVL 2000: 253-258
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSvetlana N. Yanushkevich, Denis V. Popel, Vlad P. Shmerko, V. Cheushev, Radomir S. Stankovic: Information Theoretic Approach to Minimization of Polynomial Expressions over GF(4). ISMVL 2000: 265-
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJon T. Butler, Gerhard W. Dueck, Vlad P. Shmerko, Svetlana N. Yanushkevich: Comments on "Sympathy: fast exact minimization of fixedpolarity Reed-Muller expansion for symmetric functions". IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1386-1388 (2000)
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLV. Cheushev, Vlad P. Shmerko, Dan A. Simovici, Svetlana N. Yanushkevich: Functional Entropy and Decision Trees. ISMVL 1998: 257-
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko: Test Pattern Generation for Combinatorial Multi-Valued Networks Based on Generalized D-Algorithm. ISMVL 1997: 139-144
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko, I. Bondar: Technique of Computing Logic Derivatives for MVL-Functions. ISMVL 1996: 267-272
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVlad P. Shmerko, Svetlana N. Yanushkevich, K. Malecki: A Class of Logic design Problems solved based on Parallel Computations of Butterfly Configurations. PDPTA 1996: 1589-1592

Selection of 24 from 36 records - Svetlana N. Yanushkevich has 41 coauthors

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