Hongyan Yang (Selection)

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4 Shuai Wang, Hongyan Yang, Jie Hu, Sotirios G. Ziavras: Asymmetrically banked value-aware register files for low-energy and high-performance. Microprocessors and Microsystems - Embedded Hardware Design 32(3): 171-182 (2008)

3 Shuai Wang, Hongyan Yang, Jie Hu, Sotirios G. Ziavras: Asymmetrically Banked Value-Aware Register Files. ISVLSI 2007: 363-368

2 Hongyan Yang, Shuai Wang, Sotirios G. Ziavras, Jie Hu: Vector Processing Support for FPGA-Oriented High Performance Applications. ISVLSI 2007: 447-448

1 Hongyan Yang, Sotirios G. Ziavras, Jie Hu: FPGA-based Vector Processing for Matrix Operations. ITNG 2007: 989-994

Selection of 4 from 4 records - Hongyan Yang has 3 coauthors

4		Shuai Wang, Hongyan Yang, Jie Hu, Sotirios G. Ziavras: Asymmetrically banked value-aware register files for low-energy and high-performance. Microprocessors and Microsystems - Embedded Hardware Design 32(3): 171-182 (2008)
3		Shuai Wang, Hongyan Yang, Jie Hu, Sotirios G. Ziavras: Asymmetrically Banked Value-Aware Register Files. ISVLSI 2007: 363-368
2		Hongyan Yang, Shuai Wang, Sotirios G. Ziavras, Jie Hu: Vector Processing Support for FPGA-Oriented High Performance Applications. ISVLSI 2007: 447-448
1		Hongyan Yang, Sotirios G. Ziavras, Jie Hu: FPGA-based Vector Processing for Matrix Operations. ITNG 2007: 989-994