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Chun-Chieh Wang (Selection)

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5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChun-Chieh Wang, Jing-Jia Liou, Yen-Lin Peng, Chih-Tsun Huang, Cheng-Wen Wu: A BIST Scheme for FPGA Interconnect Delay Faults. VTS 2005: 201-206

Selection of 1 from 18 records - Chun-Chieh Wang has 29 coauthors

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