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| 5 | Steven Wallace, Nader Bagherzadeh: Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors. IEEE Trans. Parallel Distrib. Syst. 9(6): 570-578 (1998) | |
| 4 | Steven Wallace, Nader Bagherzadeh: Multiple Branch and Block Prediction. HPCA 1997: 94- | |
| 3 | Steven Wallace, Nader Bagherzadeh: Instruction Fetching Mechanisms for Superscalar Microprocessors. Euro-Par, Vol. II 1996: 747-756 | |
| 2 | Steven Wallace, Nirav Dagli, Nader Bagherzadeh: Design and implementation of a 100 MHz centralized instruction window for a superscalar microprocessor. ICCD 1995: 96-101 | |
| 1 | Steven Wallace, Nader Bagherzadeh: Performance Issues of a Superscalar Microprocessor. ICPP (1) 1994: 293-297 |
Selection of 5 from 11 records - Steven Wallace has 22 coauthors
Copyright © 2009-12-05 by Michael Ley (ley@uni-trier.de)