Vishal Verma (Selection)

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2 Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia: A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs. CDES 2006: 36-38

1 Vishal Verma, Himanshu Thapliyal: A High Speed Efficient N x N Bit Multiplier Based on Ancient Indian Vedic Mathematics. VLSI 2003: 361-365

Selection of 2 from 3 records - Vishal Verma has 3 coauthors

2		Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia: A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs. CDES 2006: 36-38
1		Vishal Verma, Himanshu Thapliyal: A High Speed Efficient N x N Bit Multiplier Based on Ancient Indian Vedic Mathematics. VLSI 2003: 361-365