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Dilip P. Vasudevan (Selection)

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8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDilip P. Vasudevan, Parag K. Lala, Jia Di, James Patrick Parkerson: Reversible-logic design with online testability. IEEE T. Instrumentation and Measurement 55(2): 406-414 (2006)
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson: CMOS Realization of Online Testable Reversible Logic Gates. ISVLSI 2005: 309-310
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson: A Novel Approach for On-line Testable Reversible Logic Circuit Desig. Asian Test Symposium 2004: 325-330
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDilip P. Vasudevan, James Patrick Parkerson, Parag K. Lala: Logic implementation using a reversible gate. Circuits, Signals, and Systems 2004: 452-456
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson: Online Testable Reversible Logic Circuit Design using NAND Blocks. DFT 2004: 324-331

Selection of 5 from 16 records - Dilip P. Vasudevan has 11 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page