Sriram Swaminathan (Selection)

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4 Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne P. Burleson: A reconfigurable, power-efficient adaptive Viterbi decoder. IEEE Trans. VLSI Syst. 13(4): 484-488 (2005)

3 Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne Burleson: A dynamically reconfigurable adaptive viterbi decoder. FPGA 2002: 227-236

2 Srini Krishnamoorthy, Sriram Swaminathan, Russell Tessier: Area-Optimized Technology Mapping for Hybrid FPGAs. FPL 2000: 181-190

1 Jian Liang, Sriram Swaminathan, Russell Tessier: aSOC: A Scalable, Single-Chip Communications Architecture. IEEE PACT 2000: 37-46

Selection of 4 from 4 records - Sriram Swaminathan has 6 coauthors

4		Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne P. Burleson: A reconfigurable, power-efficient adaptive Viterbi decoder. IEEE Trans. VLSI Syst. 13(4): 484-488 (2005)
3		Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne Burleson: A dynamically reconfigurable adaptive viterbi decoder. FPGA 2002: 227-236
2		Srini Krishnamoorthy, Sriram Swaminathan, Russell Tessier: Area-Optimized Technology Mapping for Hybrid FPGAs. FPL 2000: 181-190
1		Jian Liang, Sriram Swaminathan, Russell Tessier: aSOC: A Scalable, Single-Chip Communications Architecture. IEEE PACT 2000: 37-46