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Soichi Shigeta (Selection)

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3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLBen A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa: On the Design of a Register Queue Based Processor Architecture (FaRM-rq). ISPA 2003: 248-262
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMasahiro Sowa, Ben A. Abderazek, Soichi Shigeta, Kirilka Nikolova, Tsutomu Yoshinaga: Proposal and Design of a Parallel Queue Processor Architecture (PQP). IASTED PDCS 2002: 549-554

Selection of 2 from 4 records - Soichi Shigeta has 13 coauthors

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