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Nidhal Selmane (Selection)

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7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger: Countering early evaluation: an approach towards robust dual-rail precharge logic. WESS 2010: 6
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNidhal Selmane, Shivam Bhasin, Sylvain Guilley, Tarik Graba, Jean-Luc Danger: WDDL is Protected against Setup Time Violation Attacks. FDTC 2009: 73-83
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Nidhal Selmane: Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs. HOST 2009: 15-21
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane: Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig 2009: 213-218

Selection of 4 from 9 records - Nidhal Selmane has 12 coauthors

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