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Koichi Seki (Selection)

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2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRaminder Singh Bajwa, Mitsuru Hiraki, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Koichi Seki, Katsuro Sasaki: Instruction buffering to reduce power in processors for signal processing. IEEE Trans. VLSI Syst. 5(4): 417-424 (1997)
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Katsuro Sasaki, Koichi Seki: Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer. ISLPED 1996: 353-358

Selection of 2 from 2 records - Koichi Seki has 7 coauthors

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