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| 6 | Tuhina Samanta, Hafizur Rahaman, Prasun Ghosal, Parthasarathi Dasgupta: A Method for the Multi-Net Multi-Pin Routing Problem with Layer Assignment. VLSI Design 2009: 387-392 | |
| 5 | Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta: Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations. ISVLSI 2008: 369-374 | |
| 4 | Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta: Revisiting fidelity: a case of elmore-based Y-routing trees. SLIP 2008: 27-34 | |
| 3 | Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta: Minimum-Congestion Placement for Y-interconnects: Some studies and observations. ISVLSI 2007: 73-80 | |
| 2 | Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta: A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI. ISCAS 2006 | |
| 1 | Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta: Recent Trends in the Application of Meta-Heuristics to VLSI Layout Design. IICAI 2005: 232-251 |
Selection of 6 from 6 records - Tuhina Samanta has 3 coauthors
Copyright © 2009-12-30 by Michael Ley (ley@uni-trier.de)