Tomas Rokicki (Selection)

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11 Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng: POSET timing and its application to the synthesis and verification of gate-level timed circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 769-786 (1999)

7 Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng: Automatic synthesis of gate-level timed circuits with choice. ARVLSI 1995: 42-58

5 Tomas Rokicki, Chris J. Myers: Automatic Verification of Timed Circuits. CAV 1994: 468-480

Selection of 3 from 17 records - Tomas Rokicki has 23 coauthors

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11		Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng: POSET timing and its application to the synthesis and verification of gate-level timed circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 769-786 (1999)
7		Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng: Automatic synthesis of gate-level timed circuits with choice. ARVLSI 1995: 42-58
5		Tomas Rokicki, Chris J. Myers: Automatic Verification of Timed Circuits. CAV 1994: 468-480