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Renato P. Ribas (Selection)

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36Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMayler G. A. Martins, Renato P. Ribas, André Inácio Reis: Functional composition: A new paradigm for performing logic synthesis. ISQED 2012: 236-242
35Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMayler G. A. Martins, Vinicius Callegaro, Renato P. Ribas, André Inácio Reis: Efficient method to compute minimum decision chains of Boolean functions. ACM Great Lakes Symposium on VLSI 2011: 419-422
34Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVinícius Dal Bem, Paulo F. Butzen, Felipe S. Marranghello, André Inácio Reis, Renato P. Ribas: Impact and optimization of lithography-aware regular layout in digital circuit design. ICCD 2011: 279-284
33Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRenato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov: Self-checking test circuits for latches and flip-flops. IOLTS 2011: 210-213
32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLThiago Figueiro, Renato P. Ribas, André Inácio Reis: Constructive AIG optimization considering input weights. ISQED 2011: 769-776
31Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRenato P. Ribas, S. Bavaresco, N. Schuch, Vinicius Callegaro, Marcelo Lubaszewski, André Inácio Reis: Contributions to the evaluation of ensembles of combinational logic gates. Microelectronics Journal 42(2): 371-381 (2011)
30Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLOsvaldo Martinello, Felipe S. Marques, Renato P. Ribas, André Inácio Reis: KL-Cuts: A new approach for logic synthesis targeting multiple output blocks. DATE 2010: 777-782
29Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMayler G. A. Martins, Leomar S. da Rosa Jr., Anders B. Rasmussen, Renato P. Ribas, André Inácio Reis: Boolean factoring with multi-objective goals. ICCD 2010: 229-234
28Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFelipe S. Marques, Osvaldo Martinello, Renato P. Ribas, André Inácio Reis: Improvements on the detection of false paths by using unateness and satisfiability. SBCCI 2010: 192-197
27Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVinicius Callegaro, Felipe de Souza Marques, Carlos Eduardo Klock, Leomar Soares da Rosa Jr., Renato P. Ribas, André Inácio Reis: SwitchCraft: a framework for transistor network design. SBCCI 2010: 49-53
26Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Vinícius Dal Bem, André Inácio Reis, Renato P. Ribas: Leakage Analysis Considering the Effect of Inter-Cell Wire Resistance for Nanoscaled CMOS Circuits. J. Low Power Electronics 6(1): 192-200 (2010)
25Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, André Inácio Reis, Renato P. Ribas: Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits. Microelectronics Journal 41(4): 247-255 (2010)
24Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDigeorgia N. da Silva, André Inácio Reis, Renato P. Ribas: Gate delay variability estimation method for parametric yield improvement in nanometer CMOS technology. Microelectronics Reliability 50(9-11): 1223-1229 (2010)
23Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Vinícius Dal Bem, André Inácio Reis, Renato P. Ribas: Transistor network restructuring against NBTI degradation. Microelectronics Reliability 50(9-11): 1298-1303 (2010)
21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRenato P. Ribas, S. Bavaresco, Marcelo Lubaszewski, André Inácio Reis: Efficient Test Circuit to Qualify Logic Cells. ISCAS 2009: 2733-2736
20Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLeomar S. da Rosa Jr., Felipe Ribeiro Schneider, Renato P. Ribas, André Inácio Reis: Switch level optimization of digital CMOS gate networks. ISQED 2009: 324-329
19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Renato P. Ribas: Routing Resistance Influence in Loading Effect on Leakage Analysis. PATMOS 2009: 317-325
18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDigeorgia N. da Silva, André Inácio Reis, Renato P. Ribas: CMOS logic gate performance variability related to transistor network arrangements. Microelectronics Reliability 49(9-11): 977-981 (2009)
17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, Dionatan S. Moura, André Inácio Reis, Renato P. Ribas: Simple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms. ACM Great Lakes Symposium on VLSI 2008: 407-410
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTiago Muller Gil Cardoso, Leomar S. da Rosa Jr., Felipe de Souza Marques, Renato P. Ribas, André Inácio Reis: Speed-Up of ASICs Derived from FPGAs by Transistor Network Synthesis Including Reordering. ISQED 2008: 47-52
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas: Modeling and estimating leakage current in series-parallel CMOS networks. ACM Great Lakes Symposium on VLSI 2007: 269-274
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFelipe S. Marques, Leomar S. da Rosa Jr., Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis: DAG based library-free technology mapping. ACM Great Lakes Symposium on VLSI 2007: 293-298
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas: Modeling Subthreshold Leakage Current in General Transistor Networks. ISVLSI 2007: 512-513
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas: Subthreshold Leakage Modeling and Estimation of General CMOS Complex Gates. PATMOS 2007: 474-484
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLeomar S. da Rosa Jr., André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Felipe Ribeiro Schneider: A comparative study of CMOS gates with minimum transistor stacks. SBCCI 2007: 93-98
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLeomar S. da Rosa Jr., Felipe S. Marques, Tiago Muller Gil Cardoso, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis: Fast disjoint transistor networks from BDDs. SBCCI 2006: 137-142
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLR. U. R. Mocho, G. H. Sartori, Renato P. Ribas, André Inácio Reis: Asynchronous circuit design on reconfigurable devices. SBCCI 2006: 20-25
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFelipe S. Marques, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis: A new approach to the use of satisfiability in false path detection. ACM Great Lakes Symposium on VLSI 2005: 308-311
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJoão Daniel Togni, Renato P. Ribas, Maria Lúcia Blanck Lisbôa, André Inácio Reis: Tool integration using the web-services approach. ACM Great Lakes Symposium on VLSI 2005: 337-340
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFelipe Ribeiro Schneider, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis: Exact lower bound for the number of switches in series to implement a combinational logic cell. ICCD 2005: 357-362
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMário C. B. Osorio, Carlos A. Sampaio, André Inácio Reis, Renato P. Ribas: Enhanced 32-bit carry lookahead adder using multiple output enable-disable CMOS differential logic. SBCCI 2004: 181-185
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRenato E. B. Poli, Felipe Ribeiro Schneider, Renato P. Ribas, André Inácio Reis: Unified Theory to Build Cell-Level Transistor Networks from BDDs. SBCCI 2003: 199-204
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFelipe Ribeiro Schneider, Vinícius P. Correia, Renato P. Ribas, André Inácio Reis: Comparing Transistor-Level Implementations of 4-Input Logic Functions. IWLS 2002: 361-365
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRenato P. Ribas, André Inácio Reis, Marcelo Lubaszewski: Concepção de Circuitos e Sistemas Integrados. RITA 8(1): 7-21 (2001)

Selection of 34 from 36 records - Renato P. Ribas has 37 coauthors

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