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Ricardo A. L. Reis, Ricardo Reis
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| 109 | Jürgen Becker, Marcelo O. Johann, Ricardo Reis: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers Springer 2011 | |
| 102 | Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Reis: The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms. ICCD 2010: 195-202 | |
| 95 | Guilherme Flach, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis: A Mesh-Buffer Displacement Optimization Strategy. ISVLSI 2010: 282-287 | |
| 94 | Felipe Pinto, Lucas Cavalheiro, Marcelo de Oliveira Johann, Ricardo Reis: Logical Core Algorithm: Improving Global Placement. ISVLSI 2010: 69-73 | |
| 92 | Sandro Sawicki, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis: 3D-Via Driven Partitioning for 3D VLSI Integrated Circuits. CLEI Electron. J. 13(3): (2010) | |
| 88 | Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: On the accuracy of Elmore-based Delay Models. ICECS 2009: 447-450 | |
| 86 | Sandro Sawicki, Gustavo Wilke, Marcelo de Oliveira Johann, Ricardo Reis: A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits. ICECS 2009: 852-855 | |
| 79 | Renato Fernandes Hentschke, Jagannathan Narasimhan, Marcelo O. Johann, Ricardo Reis: Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff. IEEE Trans. VLSI Syst. 17(8): 1073-1086 (2009) | |
| 71 | Renato Fernandes Hentschke, Jaganathan Narasimham, Marcelo O. Johann, Ricardo Augusto da Luz Reis: Maze routing steiner trees with effective critical sink optimization. ISPD 2007: 135-142 | |
| 67 | Guilherme Flach, Marcelo de Oliveira Johann, Renato Fernandes Hentschke, Ricardo Reis: Cell placement on graphics processing units. SBCCI 2007: 87-92 | |
| 57 | Glauco Borges Valim dos Santos, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: Channel based routing in channel-less circuits. ISCAS 2006 | |
| 50 | Renato Fernandes Hentschke, Sandro Sawicki, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. VLSI-SoC 2006: 128-133 | |
| 37 | Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis, Sergio Bampi: Design of Very Deep Pipelined Multipliers for FPGAs. DATE 2004: 52-57 | |
| 16 | Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: A study on the performance of fast initial placement algorithms. VLSI-SOC 2003: 204- | |
| 6 | Marcelo O. Johann, Andrew E. Caldwell, Ricardo Augusto da Luz Reis, Andrew B. Kahng: Admissibility Proofs for the LCS* Algorithm. IBERAMIA-SBIA 2000: 236-244 | |
| 1 | Fernanda Lima, Marcelo O. Johann, José Luís Almada Güntzel, Eduardo D'Avila, Luigi Carro, Ricardo Augusto da Luz Reis: Designing a Mask Programmable Matrix for Sequential Circuits. VLSI 1999: 439-446 |
Selection of 16 from 111 records - Ricardo Augusto da Luz Reis has 130 coauthors
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