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| 11 | Sachin S. Sapatnekar, Vasant B. Rao, Pravin M. Vaidya, Sung-Mo Kang: An exact solution to the transistor sizing problem for CMOS circuits using convex optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 12(11): 1621-1634 (1993) | |
| 10 | Sachin S. Sapatnekar, Vasant B. Rao, Pravin M. Vaidya: A Convex Optimization Approach to Transistor Sizing for CMOS Circuits. ICCAD 1991: 482-485 |
Selection of 2 from 15 records - Vasant B. Rao has 50 coauthors
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