| |
- CSB - MetaPress - Google - Bing - Yahoo
Ask others: ACM DL/Guide - - CSB - MetaPress - Google - Bing - Yahoo
| 7 |       | Ivan Radojevic, Zoran A. Salcic, Partha S. Roop: McCharts and Multiclock FSMs for modeling large scale systems. MEMOCODE 2007: 3-12 |
| 6 | | Flavius Gruian, Partha S. Roop, Zoran A. Salcic, Ivan Radojevic: The SystemJ approach to system-level design. MEMOCODE 2006: 149-158 |
| 5 | | Ivan Radojevic, Zoran A. Salcic, Partha S. Roop: Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation. VLSI Design 2006: 461-464 |
| 4 | | Ivan Radojevic, Zoran A. Salcic, Partha S. Roop: Modeling Embedded Systems: From SystemC and Esterel to DFCharts. IEEE Design & Test of Computers 23(5): 348-358 (2006) |
| 3 | | Ivan Radojevic, Zoran A. Salcic, Partha S. Roop: Modelling Heterogeneous Embedded Systems in DFCarts. FDL 2005: 441-453 |
| 2 | | Ivan Radojevic, Zoran A. Salcic, Partha S. Roop: A New Model for Heterogeneous Embedded Systems - What Esterel and SyncCharts Need to Become a Suitable Specification Platform. International Journal of Software Engineering and Knowledge Engineering 15(2): 405-410 (2005) |
| 1 |  | Zoran A. Salcic, Partha S. Roop, Dong Hui, Ivan Radojevic: HiDRA: A New Architecture for Heterogeneous Embedded Systems. ESA/VLSI 2004: 164-170 |
Selection of 7 from 7 records - Ivan Radojevic has 4 coauthors
Copyright © 2009-12-31 by Michael Ley (ley@uni-trier.de)