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| 3 | James Poe, Clay Hughes, Tao Li: TransMetric: architecture independent workload characterization for transactional memory benchmarks. ICS 2009: 491-492 | |
| 2 | James Poe, Chang-Burm Cho, Tao Li: Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design. SBAC-PAD 2008: 159-166 | |
| 1 | Xin Fu, James Poe, Tao Li, José A. B. Fortes: Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. MASCOTS 2006: 147-155 |
Selection of 3 from 3 records - James Poe has 5 coauthors
Copyright © 2009-12-28 by Michael Ley (ley@uni-trier.de)