Newton Petersen (Selection)

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2 Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Sadia Malik, Newton Petersen, Kaushik Ravindran, Trung N. Tran, Guoqiang Wang, Guang Yang: Early timing estimation for system-level design using FPGAs (abstract only). FPGA 2012: 271

Selection of 1 from 2 records - Newton Petersen has 11 coauthors

Last update 2012-09-10 CET by the DBLP Team —

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