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| 14 | Jorge Suris, Cameron Patterson, Peter Athanas: An efficient run-time router for connecting modules in FPGAS. FPL 2008: 125-130 | |
| 13 | Matthew Shelburne, Cameron Patterson, Peter Athanas, Mark Jones, Brian Martin, Ryan Fong: Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip. FPL 2008: 257-262 | |
| 12 | Peter M. Athanas, J. Bowen, T. Dunham, Cameron Patterson, J. Rice, Matthew Shelburne, J. Surís, Mark B. Bucciero, Jonathan Graf: Wires On Demand: Run-Time Communication Synthesis for Reconfigurable Computing. FPL 2007: 513-516 | |
| 11 | Stephen D. Craven, Cameron Patterson, Peter M. Athanas: A Methodology for Generating Application-Specific Heterogeneous Processor Arrays. HICSS 2006 | |
| 10 | Jesse Hunter, Peter Athanas, Cameron Patterson: VTSim: A Virtex-II Device Simulator. ERSA 2004: 297-298 | |
| 9 | Alexandra Poetter, Jesse Hunter, Cameron Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner: JHDLBits: The Merging of Two Worlds. FPL 2004: 414-423 |
Selection of 6 from 14 records - Cameron Patterson has 24 coauthors
Copyright © 2009-12-05 by Michael Ley (ley@uni-trier.de)