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Keshab K. Parhi (Selection)

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56Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYun-Nan Chang, Ching-Yi Wang, Keshab K. Parhi: Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units. VLSI Signal Processing 19(3): 243-256 (1998)
43Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYun-Nan Chang, Ching-Yi Wang, Keshab K. Parhi: Loop-List Scheduling for Heterogeneous Functional Units. Great Lakes Symposium on VLSI 1996: 2-7
32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChing-Yi Wang, Keshab K. Parhi: High-level DSP synthesis using concurrent transformations, scheduling, and allocation. IEEE Trans. on CAD of Integrated Circuits and Systems 14(3): 274-295 (1995)
30Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChing-Yi Wang, Keshab K. Parhi: Resource-constrained loop list scheduler for DSP algorithms. VLSI Signal Processing 11(1-2): 75-96 (1995)
18no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChing-Yi Wang, Keshab K. Parhi: Loop List Scheduler for DSP Algorithms under Resource Consraints. ISCAS 1993: 1662-1665

Selection of 5 from 203 records - Keshab K. Parhi has 90 coauthors

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