John O'Leary (Selection)

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18 Cherif Salama, Gregory Malecha, Walid Taha, Jim Grundy, John O'Leary: Static consistency checking for Verilog wire interconnects - Using dependent types to check the sanity of Verilog descriptions. Higher-Order and Symbolic Computation 24(1-2): 81-114 (2011)

17 Jennifer Gillenwater, Gregory Malecha, Cherif Salama, Angela Yun Zhu, Walid Taha, Jim Grundy, John O'Leary: Synthesizable High Level Hardware Descriptions. New Generation Comput. 28(4): 339-369 (2010)

15 Cherif Salama, Gregory Malecha, Walid Taha, Jim Grundy, John O'Leary: Static consistency checking for verilog wire interconnects: using dependent types to check the sanity of verilog descriptions. PEPM 2009: 121-130

14 Jennifer Gillenwater, Gregory Malecha, Cherif Salama, Angela Yun Zhu, Walid Taha, Jim Grundy, John O'Leary: Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability. PEPM 2008: 41-50

Selection of 4 from 18 records - John O'Leary has 26 coauthors

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18		Cherif Salama, Gregory Malecha, Walid Taha, Jim Grundy, John O'Leary: Static consistency checking for Verilog wire interconnects - Using dependent types to check the sanity of Verilog descriptions. Higher-Order and Symbolic Computation 24(1-2): 81-114 (2011)
17		Jennifer Gillenwater, Gregory Malecha, Cherif Salama, Angela Yun Zhu, Walid Taha, Jim Grundy, John O'Leary: Synthesizable High Level Hardware Descriptions. New Generation Comput. 28(4): 339-369 (2010)
15		Cherif Salama, Gregory Malecha, Walid Taha, Jim Grundy, John O'Leary: Static consistency checking for verilog wire interconnects: using dependent types to check the sanity of verilog descriptions. PEPM 2009: 121-130
14		Jennifer Gillenwater, Gregory Malecha, Cherif Salama, Angela Yun Zhu, Walid Taha, Jim Grundy, John O'Leary: Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability. PEPM 2008: 41-50