Jayapreetha Natesan (Selection)

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2 Jayapreetha Natesan, Damu Radhakrishnan: Shift Invert Coding (SINV) for Low Power VLSI. DSD 2004: 190-194

1 Jayapreetha Natesan, Damu Radhakrishnan: A Novel Bus Encoding Technique for Low Power VLSI. ESA/VLSI 2004: 54-62

Selection of 2 from 2 records - Jayapreetha Natesan has 1 coauthors

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2		Jayapreetha Natesan, Damu Radhakrishnan: Shift Invert Coding (SINV) for Low Power VLSI. DSD 2004: 190-194
1		Jayapreetha Natesan, Damu Radhakrishnan: A Novel Bus Encoding Technique for Low Power VLSI. ESA/VLSI 2004: 54-62