Saraju P. Mohanty (Selection)

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33 Saraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos: Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits. DATE 2006: 1191-1196

27 Saraju P. Mohanty, Elias Kougianos, Ramakrishna Velagapudi, Valmiki Mukherjee: Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis. ISCAS 2006

25 Saraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos: Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective. ISQED 2006: 564-569

18 Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki Mukherjee, Hao Li: Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits. ISVLSI 2005: 248-249

Selection of 4 from 94 records - Saraju P. Mohanty has 63 coauthors

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33		Saraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos: Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits. DATE 2006: 1191-1196
27		Saraju P. Mohanty, Elias Kougianos, Ramakrishna Velagapudi, Valmiki Mukherjee: Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis. ISCAS 2006
25		Saraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos: Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective. ISQED 2006: 564-569
18		Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki Mukherjee, Hao Li: Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits. ISVLSI 2005: 248-249