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| 17 | Yoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno: A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines. J. Solid-State Circuits 47(4): 832-840 (2012) |
Selection of 1 from 18 records - Masayuki Mizuno has 70 coauthors
Last update 2012-09-10 CET by the DBLP Team —
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