Christos Mavrokefalidis (Selection)

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4 Giorgos Dimitrakopoulos, Costas Galanopoulos, Christos Mavrokefalidis, Dimitris Nikolos: Low-Power Leading-Zero Counting and Anticipation Logic for High-Speed Floating Point Units. IEEE Trans. VLSI Syst. 16(7): 837-850 (2008)

3 Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: Sorter Based Permutation Units for Media-Enhanced Microprocessors. IEEE Trans. VLSI Syst. 15(6): 711-715 (2007)

2 Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: An Energy-Delay Efficient Subword Permutation Unit. ASAP 2006: 245-252

1 Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: Fast bit permutation unit for media enhanced microprocessors. ISCAS 2006

Selection of 4 from 4 records - Christos Mavrokefalidis has 3 coauthors

4		Giorgos Dimitrakopoulos, Costas Galanopoulos, Christos Mavrokefalidis, Dimitris Nikolos: Low-Power Leading-Zero Counting and Anticipation Logic for High-Speed Floating Point Units. IEEE Trans. VLSI Syst. 16(7): 837-850 (2008)
3		Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: Sorter Based Permutation Units for Media-Enhanced Microprocessors. IEEE Trans. VLSI Syst. 15(6): 711-715 (2007)
2		Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: An Energy-Delay Efficient Subword Permutation Unit. ASAP 2006: 245-252
1		Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: Fast bit permutation unit for media enhanced microprocessors. ISCAS 2006