Guido Masera (Selection)

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20 Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: An electromigration and thermal model of power wires for a priori high-level reliability prediction. IEEE Trans. VLSI Syst. 12(4): 349-358 (2004)

19 Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. Microelectronics Journal 35(10): 849-857 (2004)

17 M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. PATMOS 2003: 121-130

16 Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Effects of Temperature in Deep-Submicron Global Interconnect Optimization. PATMOS 2003: 90-100

15 Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Coupled electro-thermal modeling and optimization of clock networks. Microelectronics Journal 34(12): 1175-1185 (2003)

11 Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni: Clock Distribution Network Optimization under Self-Heating and Timing Constraints. PATMOS 2002: 198-208

9 Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Synthesis of low-leakage PD-SOI circuits with body-biasing. ISLPED 2001: 287-290

Selection of 7 from 73 records - Guido Masera has 65 coauthors

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20		Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: An electromigration and thermal model of power wires for a priori high-level reliability prediction. IEEE Trans. VLSI Syst. 12(4): 349-358 (2004)
19		Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. Microelectronics Journal 35(10): 849-857 (2004)
17		M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. PATMOS 2003: 121-130
16		Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Effects of Temperature in Deep-Submicron Global Interconnect Optimization. PATMOS 2003: 90-100
15		Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Coupled electro-thermal modeling and optimization of clock networks. Microelectronics Journal 34(12): 1175-1185 (2003)
11		Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni: Clock Distribution Network Optimization under Self-Heating and Timing Constraints. PATMOS 2002: 198-208
9		Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Synthesis of low-leakage PD-SOI circuits with body-biasing. ISLPED 2001: 287-290