Xiangyuan Liu (Selection)

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2 Shuming Chen, Xiangyuan Liu: A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs. NOCS 2007: 75-82

1 Xiangyuan Liu, Shuming Chen: Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning. ACM Great Lakes Symposium on VLSI 2006: 91-94

Selection of 2 from 2 records - Xiangyuan Liu has 1 coauthors

2		Shuming Chen, Xiangyuan Liu: A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs. NOCS 2007: 75-82
1		Xiangyuan Liu, Shuming Chen: Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning. ACM Great Lakes Symposium on VLSI 2006: 91-94