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Jaejin Lee (Selection)

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55Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSeungkyun Kim, Kiwon Kwon, Chihun Kim, Choonki Jang, Jaejin Lee, Sang Lyul Min: Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations. ACM Trans. Embedded Comput. Syst. 10(4): 40 (2011)
48Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYoon Jae Seong, Eyee Hyun Nam, Jinhyuk Yoon, Hongseok Kim, Jin-yong Choi, Sookwan Lee, Young Hyun Bae, Jaejin Lee, Yookun Cho, Sang Lyul Min: Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture. IEEE Trans. Computers 59(7): 905-921 (2010)
47Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLBernhard Egger, Seungkyun Kim, Choonki Jang, Jaejin Lee, Sang Lyul Min, Heonshik Shin: Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU. IEEE Trans. Computers 59(8): 1047-1062 (2010)
37Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min: Selective code transformation for dual instruction set processors. ACM Trans. Embedded Comput. Syst. 6(2): (2007)
36Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLBernhard Egger, Chihun Kim, Choonki Jang, Yoonsung Nam, Jaejin Lee, Sang Lyul Min: A dynamic code placement technique for scratchpad memory using postpass optimization. CASES 2006: 223-233
28Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChanik Park, Junghee Lim, Kiwon Kwon, Jaejin Lee, Sang Lyul Min: Compiler-assisted demand paging for embedded systems with flash memory. EMSOFT 2004: 114-124
26Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min: A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor. SCOPES 2004: 244-258
22Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSheayun Lee, Jaejin Lee, Sang Lyul Min, Jason Hiser, Jack W. Davidson: Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation. SCOPES 2003: 33-48
21no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min: A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors. WCET 2003: 91-94

Selection of 9 from 66 records - Jaejin Lee has 95 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page